127 lines
2.9 KiB
YAML
127 lines
2.9 KiB
YAML
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/devfreq/nvidia,tegra30-actmon.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: NVIDIA Tegra30 Activity Monitor
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maintainers:
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- Dmitry Osipenko <digetx@gmail.com>
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- Jon Hunter <jonathanh@nvidia.com>
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- Thierry Reding <thierry.reding@gmail.com>
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description: |
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The activity monitor block collects statistics about the behaviour of other
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components in the system. This information can be used to derive the rate at
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which the external memory needs to be clocked in order to serve all requests
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from the monitored clients.
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properties:
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compatible:
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enum:
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- nvidia,tegra30-actmon
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- nvidia,tegra114-actmon
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- nvidia,tegra124-actmon
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- nvidia,tegra210-actmon
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reg:
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maxItems: 1
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clocks:
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maxItems: 2
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clock-names:
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items:
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- const: actmon
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- const: emc
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resets:
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maxItems: 1
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reset-names:
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items:
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- const: actmon
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interrupts:
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maxItems: 1
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interconnects:
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minItems: 1
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maxItems: 12
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interconnect-names:
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minItems: 1
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maxItems: 12
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description:
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Should include name of the interconnect path for each interconnect
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entry. Consult TRM documentation for information about available
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memory clients, see MEMORY CONTROLLER and ACTIVITY MONITOR sections.
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operating-points-v2:
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description:
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Should contain freqs and voltages and opp-supported-hw property, which
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is a bitfield indicating SoC speedo ID mask.
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"#cooling-cells":
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const: 2
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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- resets
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- reset-names
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- interrupts
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- interconnects
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- interconnect-names
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- operating-points-v2
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- "#cooling-cells"
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/memory/tegra30-mc.h>
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mc: memory-controller@7000f000 {
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compatible = "nvidia,tegra30-mc";
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reg = <0x7000f000 0x400>;
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clocks = <&clk 32>;
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clock-names = "mc";
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interrupts = <0 77 4>;
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#iommu-cells = <1>;
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#reset-cells = <1>;
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#interconnect-cells = <1>;
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};
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emc: external-memory-controller@7000f400 {
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compatible = "nvidia,tegra30-emc";
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reg = <0x7000f400 0x400>;
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interrupts = <0 78 4>;
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clocks = <&clk 57>;
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nvidia,memory-controller = <&mc>;
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operating-points-v2 = <&dvfs_opp_table>;
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power-domains = <&domain>;
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#interconnect-cells = <0>;
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};
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actmon@6000c800 {
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compatible = "nvidia,tegra30-actmon";
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reg = <0x6000c800 0x400>;
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interrupts = <0 45 4>;
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clocks = <&clk 119>, <&clk 57>;
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clock-names = "actmon", "emc";
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resets = <&rst 119>;
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reset-names = "actmon";
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operating-points-v2 = <&dvfs_opp_table>;
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interconnects = <&mc TEGRA30_MC_MPCORER &emc>;
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interconnect-names = "cpu-read";
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#cooling-cells = <2>;
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};
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