61 lines
1.3 KiB
YAML
61 lines
1.3 KiB
YAML
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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# Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/crypto/atmel,at91sam9g46-sha.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Atmel Secure Hash Algorithm (SHA) HW cryptographic accelerator
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maintainers:
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- Tudor Ambarus <tudor.ambarus@microchip.com>
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properties:
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compatible:
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const: atmel,at91sam9g46-sha
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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maxItems: 1
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clock-names:
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const: sha_clk
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dmas:
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maxItems: 1
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description: TX DMA Channel
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dma-names:
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const: tx
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/at91.h>
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#include <dt-bindings/dma/at91.h>
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sha: crypto@e1814000 {
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compatible = "atmel,at91sam9g46-sha";
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reg = <0xe1814000 0x100>;
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interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&pmc PMC_TYPE_PERIPHERAL 83>;
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clock-names = "sha_clk";
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dmas = <&dma0 AT91_XDMAC_DT_PERID(48)>;
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dma-names = "tx";
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};
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