709 lines
22 KiB
C
709 lines
22 KiB
C
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// SPDX-License-Identifier: GPL-2.0
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/* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
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* Copyright (C) 2018-2022 Linaro Ltd.
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*/
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/bits.h>
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#include <linux/bitops.h>
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#include <linux/bitfield.h>
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#include <linux/io.h>
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#include <linux/build_bug.h>
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#include <linux/device.h>
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#include <linux/dma-mapping.h>
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#include "ipa.h"
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#include "ipa_version.h"
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#include "ipa_endpoint.h"
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#include "ipa_table.h"
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#include "ipa_reg.h"
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#include "ipa_mem.h"
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#include "ipa_cmd.h"
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#include "gsi.h"
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#include "gsi_trans.h"
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/**
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* DOC: IPA Filter and Route Tables
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*
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* The IPA has tables defined in its local (IPA-resident) memory that define
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* filter and routing rules. An entry in either of these tables is a little
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* endian 64-bit "slot" that holds the address of a rule definition. (The
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* size of these slots is 64 bits regardless of the host DMA address size.)
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*
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* Separate tables (both filter and route) used for IPv4 and IPv6. There
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* are normally another set of "hashed" filter and route tables, which are
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* used with a hash of message metadata. Hashed operation is not supported
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* by all IPA hardware (IPA v4.2 doesn't support hashed tables).
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*
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* Rules can be in local memory or in DRAM (system memory). The offset of
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* an object (such as a route or filter table) in IPA-resident memory must
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* 128-byte aligned. An object in system memory (such as a route or filter
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* rule) must be at an 8-byte aligned address. We currently only place
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* route or filter rules in system memory.
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*
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* A rule consists of a contiguous block of 32-bit values terminated with
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* 32 zero bits. A special "zero entry" rule consisting of 64 zero bits
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* represents "no filtering" or "no routing," and is the reset value for
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* filter or route table rules.
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*
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* Each filter rule is associated with an AP or modem TX endpoint, though
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* not all TX endpoints support filtering. The first 64-bit slot in a
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* filter table is a bitmap indicating which endpoints have entries in
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* the table. The low-order bit (bit 0) in this bitmap represents a
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* special global filter, which applies to all traffic. This is not
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* used in the current code. Bit 1, if set, indicates that there is an
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* entry (i.e. slot containing a system address referring to a rule) for
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* endpoint 0 in the table. Bit 3, if set, indicates there is an entry
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* for endpoint 2, and so on. Space is set aside in IPA local memory to
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* hold as many filter table entries as might be required, but typically
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* they are not all used.
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*
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* The AP initializes all entries in a filter table to refer to a "zero"
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* entry. Once initialized the modem and AP update the entries for
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* endpoints they "own" directly. Currently the AP does not use the
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* IPA filtering functionality.
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*
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* IPA Filter Table
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* ----------------------
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* endpoint bitmap | 0x0000000000000048 | Bits 3 and 6 set (endpoints 2 and 5)
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* |--------------------|
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* 1st endpoint | 0x000123456789abc0 | DMA address for modem endpoint 2 rule
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* |--------------------|
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* 2nd endpoint | 0x000123456789abf0 | DMA address for AP endpoint 5 rule
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* |--------------------|
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* (unused) | | (Unused space in filter table)
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* |--------------------|
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* . . .
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* |--------------------|
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* (unused) | | (Unused space in filter table)
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* ----------------------
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*
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* The set of available route rules is divided about equally between the AP
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* and modem. The AP initializes all entries in a route table to refer to
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* a "zero entry". Once initialized, the modem and AP are responsible for
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* updating their own entries. All entries in a route table are usable,
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* though the AP currently does not use the IPA routing functionality.
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*
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* IPA Route Table
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* ----------------------
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* 1st modem route | 0x0001234500001100 | DMA address for first route rule
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* |--------------------|
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* 2nd modem route | 0x0001234500001140 | DMA address for second route rule
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* |--------------------|
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* . . .
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* |--------------------|
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* Last modem route| 0x0001234500002280 | DMA address for Nth route rule
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* |--------------------|
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* 1st AP route | 0x0001234500001100 | DMA address for route rule (N+1)
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* |--------------------|
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* 2nd AP route | 0x0001234500001140 | DMA address for next route rule
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* |--------------------|
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* . . .
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* |--------------------|
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* Last AP route | 0x0001234500002280 | DMA address for last route rule
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* ----------------------
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*/
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/* Assignment of route table entries to the modem and AP */
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#define IPA_ROUTE_MODEM_MIN 0
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#define IPA_ROUTE_AP_MIN IPA_ROUTE_MODEM_COUNT
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#define IPA_ROUTE_AP_COUNT \
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(IPA_ROUTE_COUNT_MAX - IPA_ROUTE_MODEM_COUNT)
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/* Filter or route rules consist of a set of 32-bit values followed by a
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* 32-bit all-zero rule list terminator. The "zero rule" is simply an
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* all-zero rule followed by the list terminator.
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*/
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#define IPA_ZERO_RULE_SIZE (2 * sizeof(__le32))
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/* Check things that can be validated at build time. */
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static void ipa_table_validate_build(void)
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{
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/* Filter and route tables contain DMA addresses that refer
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* to filter or route rules. But the size of a table entry
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* is 64 bits regardless of what the size of an AP DMA address
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* is. A fixed constant defines the size of an entry, and
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* code in ipa_table_init() uses a pointer to __le64 to
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* initialize tables.
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*/
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BUILD_BUG_ON(sizeof(dma_addr_t) > sizeof(__le64));
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/* A "zero rule" is used to represent no filtering or no routing.
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* It is a 64-bit block of zeroed memory. Code in ipa_table_init()
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* assumes that it can be written using a pointer to __le64.
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*/
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BUILD_BUG_ON(IPA_ZERO_RULE_SIZE != sizeof(__le64));
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/* Impose a practical limit on the number of routes */
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BUILD_BUG_ON(IPA_ROUTE_COUNT_MAX > 32);
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/* The modem must be allotted at least one route table entry */
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BUILD_BUG_ON(!IPA_ROUTE_MODEM_COUNT);
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/* But it can't have more than what is available */
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BUILD_BUG_ON(IPA_ROUTE_MODEM_COUNT > IPA_ROUTE_COUNT_MAX);
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}
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static bool
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ipa_table_valid_one(struct ipa *ipa, enum ipa_mem_id mem_id, bool route)
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{
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const struct ipa_mem *mem = ipa_mem_find(ipa, mem_id);
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struct device *dev = &ipa->pdev->dev;
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u32 size;
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if (route)
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size = IPA_ROUTE_COUNT_MAX * sizeof(__le64);
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else
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size = (1 + IPA_FILTER_COUNT_MAX) * sizeof(__le64);
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if (!ipa_cmd_table_valid(ipa, mem, route))
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return false;
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/* mem->size >= size is sufficient, but we'll demand more */
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if (mem->size == size)
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return true;
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/* Hashed table regions can be zero size if hashing is not supported */
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if (ipa_table_hash_support(ipa) && !mem->size)
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return true;
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dev_err(dev, "%s table region %u size 0x%02x, expected 0x%02x\n",
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route ? "route" : "filter", mem_id, mem->size, size);
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return false;
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}
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/* Verify the filter and route table memory regions are the expected size */
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bool ipa_table_valid(struct ipa *ipa)
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{
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bool valid;
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valid = ipa_table_valid_one(ipa, IPA_MEM_V4_FILTER, false);
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valid = valid && ipa_table_valid_one(ipa, IPA_MEM_V6_FILTER, false);
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valid = valid && ipa_table_valid_one(ipa, IPA_MEM_V4_ROUTE, true);
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valid = valid && ipa_table_valid_one(ipa, IPA_MEM_V6_ROUTE, true);
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if (!ipa_table_hash_support(ipa))
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return valid;
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valid = valid && ipa_table_valid_one(ipa, IPA_MEM_V4_FILTER_HASHED,
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false);
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valid = valid && ipa_table_valid_one(ipa, IPA_MEM_V6_FILTER_HASHED,
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false);
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valid = valid && ipa_table_valid_one(ipa, IPA_MEM_V4_ROUTE_HASHED,
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true);
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valid = valid && ipa_table_valid_one(ipa, IPA_MEM_V6_ROUTE_HASHED,
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true);
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return valid;
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}
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bool ipa_filter_map_valid(struct ipa *ipa, u32 filter_map)
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{
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struct device *dev = &ipa->pdev->dev;
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u32 count;
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if (!filter_map) {
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dev_err(dev, "at least one filtering endpoint is required\n");
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return false;
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}
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count = hweight32(filter_map);
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if (count > IPA_FILTER_COUNT_MAX) {
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dev_err(dev, "too many filtering endpoints (%u, max %u)\n",
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count, IPA_FILTER_COUNT_MAX);
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return false;
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}
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return true;
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}
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/* Zero entry count means no table, so just return a 0 address */
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static dma_addr_t ipa_table_addr(struct ipa *ipa, bool filter_mask, u16 count)
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{
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u32 skip;
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if (!count)
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return 0;
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WARN_ON(count > max_t(u32, IPA_FILTER_COUNT_MAX, IPA_ROUTE_COUNT_MAX));
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/* Skip over the zero rule and possibly the filter mask */
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skip = filter_mask ? 1 : 2;
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return ipa->table_addr + skip * sizeof(*ipa->table_virt);
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}
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static void ipa_table_reset_add(struct gsi_trans *trans, bool filter,
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u16 first, u16 count, enum ipa_mem_id mem_id)
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{
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struct ipa *ipa = container_of(trans->gsi, struct ipa, gsi);
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const struct ipa_mem *mem = ipa_mem_find(ipa, mem_id);
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dma_addr_t addr;
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u32 offset;
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u16 size;
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/* Nothing to do if the table memory region is empty */
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if (!mem->size)
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return;
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if (filter)
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first++; /* skip over bitmap */
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offset = mem->offset + first * sizeof(__le64);
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size = count * sizeof(__le64);
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addr = ipa_table_addr(ipa, false, count);
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ipa_cmd_dma_shared_mem_add(trans, offset, size, addr, true);
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}
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/* Reset entries in a single filter table belonging to either the AP or
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* modem to refer to the zero entry. The memory region supplied will be
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* for the IPv4 and IPv6 non-hashed and hashed filter tables.
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*/
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static int
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ipa_filter_reset_table(struct ipa *ipa, enum ipa_mem_id mem_id, bool modem)
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{
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u32 ep_mask = ipa->filter_map;
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u32 count = hweight32(ep_mask);
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struct gsi_trans *trans;
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enum gsi_ee_id ee_id;
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trans = ipa_cmd_trans_alloc(ipa, count);
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if (!trans) {
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dev_err(&ipa->pdev->dev,
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"no transaction for %s filter reset\n",
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modem ? "modem" : "AP");
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return -EBUSY;
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}
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ee_id = modem ? GSI_EE_MODEM : GSI_EE_AP;
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while (ep_mask) {
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u32 endpoint_id = __ffs(ep_mask);
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struct ipa_endpoint *endpoint;
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ep_mask ^= BIT(endpoint_id);
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endpoint = &ipa->endpoint[endpoint_id];
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if (endpoint->ee_id != ee_id)
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continue;
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ipa_table_reset_add(trans, true, endpoint_id, 1, mem_id);
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}
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gsi_trans_commit_wait(trans);
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return 0;
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}
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/* Theoretically, each filter table could have more filter slots to
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* update than the maximum number of commands in a transaction. So
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* we do each table separately.
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*/
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static int ipa_filter_reset(struct ipa *ipa, bool modem)
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{
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int ret;
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ret = ipa_filter_reset_table(ipa, IPA_MEM_V4_FILTER, modem);
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if (ret)
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return ret;
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ret = ipa_filter_reset_table(ipa, IPA_MEM_V6_FILTER, modem);
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if (ret || !ipa_table_hash_support(ipa))
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return ret;
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ret = ipa_filter_reset_table(ipa, IPA_MEM_V4_FILTER_HASHED, modem);
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if (ret)
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return ret;
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return ipa_filter_reset_table(ipa, IPA_MEM_V6_FILTER_HASHED, modem);
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}
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/* The AP routes and modem routes are each contiguous within the
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* table. We can update each table with a single command, and we
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* won't exceed the per-transaction command limit.
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* */
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static int ipa_route_reset(struct ipa *ipa, bool modem)
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{
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bool hash_support = ipa_table_hash_support(ipa);
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struct gsi_trans *trans;
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u16 first;
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u16 count;
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trans = ipa_cmd_trans_alloc(ipa, hash_support ? 4 : 2);
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if (!trans) {
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dev_err(&ipa->pdev->dev,
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"no transaction for %s route reset\n",
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modem ? "modem" : "AP");
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return -EBUSY;
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}
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if (modem) {
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first = IPA_ROUTE_MODEM_MIN;
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count = IPA_ROUTE_MODEM_COUNT;
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} else {
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first = IPA_ROUTE_AP_MIN;
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count = IPA_ROUTE_AP_COUNT;
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}
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ipa_table_reset_add(trans, false, first, count, IPA_MEM_V4_ROUTE);
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ipa_table_reset_add(trans, false, first, count, IPA_MEM_V6_ROUTE);
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if (hash_support) {
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ipa_table_reset_add(trans, false, first, count,
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IPA_MEM_V4_ROUTE_HASHED);
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ipa_table_reset_add(trans, false, first, count,
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IPA_MEM_V6_ROUTE_HASHED);
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}
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gsi_trans_commit_wait(trans);
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return 0;
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}
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void ipa_table_reset(struct ipa *ipa, bool modem)
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{
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struct device *dev = &ipa->pdev->dev;
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const char *ee_name;
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int ret;
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ee_name = modem ? "modem" : "AP";
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/* Report errors, but reset filter and route tables */
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ret = ipa_filter_reset(ipa, modem);
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if (ret)
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dev_err(dev, "error %d resetting filter table for %s\n",
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ret, ee_name);
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ret = ipa_route_reset(ipa, modem);
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if (ret)
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dev_err(dev, "error %d resetting route table for %s\n",
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ret, ee_name);
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}
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int ipa_table_hash_flush(struct ipa *ipa)
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{
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const struct ipa_reg *reg;
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struct gsi_trans *trans;
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u32 offset;
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u32 val;
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if (!ipa_table_hash_support(ipa))
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return 0;
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trans = ipa_cmd_trans_alloc(ipa, 1);
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if (!trans) {
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dev_err(&ipa->pdev->dev, "no transaction for hash flush\n");
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return -EBUSY;
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}
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reg = ipa_reg(ipa, FILT_ROUT_HASH_FLUSH);
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offset = ipa_reg_offset(reg);
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val = ipa_reg_bit(reg, IPV6_ROUTER_HASH);
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val |= ipa_reg_bit(reg, IPV6_FILTER_HASH);
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val |= ipa_reg_bit(reg, IPV4_ROUTER_HASH);
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val |= ipa_reg_bit(reg, IPV4_FILTER_HASH);
|
||
|
|
||
|
ipa_cmd_register_write_add(trans, offset, val, val, false);
|
||
|
|
||
|
gsi_trans_commit_wait(trans);
|
||
|
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
static void ipa_table_init_add(struct gsi_trans *trans, bool filter,
|
||
|
enum ipa_cmd_opcode opcode,
|
||
|
enum ipa_mem_id mem_id,
|
||
|
enum ipa_mem_id hash_mem_id)
|
||
|
{
|
||
|
struct ipa *ipa = container_of(trans->gsi, struct ipa, gsi);
|
||
|
const struct ipa_mem *hash_mem = ipa_mem_find(ipa, hash_mem_id);
|
||
|
const struct ipa_mem *mem = ipa_mem_find(ipa, mem_id);
|
||
|
dma_addr_t hash_addr;
|
||
|
dma_addr_t addr;
|
||
|
u32 zero_offset;
|
||
|
u16 hash_count;
|
||
|
u32 zero_size;
|
||
|
u16 hash_size;
|
||
|
u16 count;
|
||
|
u16 size;
|
||
|
|
||
|
/* Compute the number of table entries to initialize */
|
||
|
if (filter) {
|
||
|
/* The number of filtering endpoints determines number of
|
||
|
* entries in the filter table; we also add one more "slot"
|
||
|
* to hold the bitmap itself. The size of the hashed filter
|
||
|
* table is either the same as the non-hashed one, or zero.
|
||
|
*/
|
||
|
count = 1 + hweight32(ipa->filter_map);
|
||
|
hash_count = hash_mem->size ? count : 0;
|
||
|
} else {
|
||
|
/* The size of a route table region determines the number
|
||
|
* of entries it has.
|
||
|
*/
|
||
|
count = mem->size / sizeof(__le64);
|
||
|
hash_count = hash_mem->size / sizeof(__le64);
|
||
|
}
|
||
|
size = count * sizeof(__le64);
|
||
|
hash_size = hash_count * sizeof(__le64);
|
||
|
|
||
|
addr = ipa_table_addr(ipa, filter, count);
|
||
|
hash_addr = ipa_table_addr(ipa, filter, hash_count);
|
||
|
|
||
|
ipa_cmd_table_init_add(trans, opcode, size, mem->offset, addr,
|
||
|
hash_size, hash_mem->offset, hash_addr);
|
||
|
if (!filter)
|
||
|
return;
|
||
|
|
||
|
/* Zero the unused space in the filter table */
|
||
|
zero_offset = mem->offset + size;
|
||
|
zero_size = mem->size - size;
|
||
|
ipa_cmd_dma_shared_mem_add(trans, zero_offset, zero_size,
|
||
|
ipa->zero_addr, true);
|
||
|
if (!hash_size)
|
||
|
return;
|
||
|
|
||
|
/* Zero the unused space in the hashed filter table */
|
||
|
zero_offset = hash_mem->offset + hash_size;
|
||
|
zero_size = hash_mem->size - hash_size;
|
||
|
ipa_cmd_dma_shared_mem_add(trans, zero_offset, zero_size,
|
||
|
ipa->zero_addr, true);
|
||
|
}
|
||
|
|
||
|
int ipa_table_setup(struct ipa *ipa)
|
||
|
{
|
||
|
struct gsi_trans *trans;
|
||
|
|
||
|
/* We will need at most 8 TREs:
|
||
|
* - IPv4:
|
||
|
* - One for route table initialization (non-hashed and hashed)
|
||
|
* - One for filter table initialization (non-hashed and hashed)
|
||
|
* - One to zero unused entries in the non-hashed filter table
|
||
|
* - One to zero unused entries in the hashed filter table
|
||
|
* - IPv6:
|
||
|
* - One for route table initialization (non-hashed and hashed)
|
||
|
* - One for filter table initialization (non-hashed and hashed)
|
||
|
* - One to zero unused entries in the non-hashed filter table
|
||
|
* - One to zero unused entries in the hashed filter table
|
||
|
* All platforms support at least 8 TREs in a transaction.
|
||
|
*/
|
||
|
trans = ipa_cmd_trans_alloc(ipa, 8);
|
||
|
if (!trans) {
|
||
|
dev_err(&ipa->pdev->dev, "no transaction for table setup\n");
|
||
|
return -EBUSY;
|
||
|
}
|
||
|
|
||
|
ipa_table_init_add(trans, false, IPA_CMD_IP_V4_ROUTING_INIT,
|
||
|
IPA_MEM_V4_ROUTE, IPA_MEM_V4_ROUTE_HASHED);
|
||
|
|
||
|
ipa_table_init_add(trans, false, IPA_CMD_IP_V6_ROUTING_INIT,
|
||
|
IPA_MEM_V6_ROUTE, IPA_MEM_V6_ROUTE_HASHED);
|
||
|
|
||
|
ipa_table_init_add(trans, true, IPA_CMD_IP_V4_FILTER_INIT,
|
||
|
IPA_MEM_V4_FILTER, IPA_MEM_V4_FILTER_HASHED);
|
||
|
|
||
|
ipa_table_init_add(trans, true, IPA_CMD_IP_V6_FILTER_INIT,
|
||
|
IPA_MEM_V6_FILTER, IPA_MEM_V6_FILTER_HASHED);
|
||
|
|
||
|
gsi_trans_commit_wait(trans);
|
||
|
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
/**
|
||
|
* ipa_filter_tuple_zero() - Zero an endpoint's hashed filter tuple
|
||
|
* @endpoint: Endpoint whose filter hash tuple should be zeroed
|
||
|
*
|
||
|
* Endpoint must be for the AP (not modem) and support filtering. Updates
|
||
|
* the filter hash values without changing route ones.
|
||
|
*/
|
||
|
static void ipa_filter_tuple_zero(struct ipa_endpoint *endpoint)
|
||
|
{
|
||
|
u32 endpoint_id = endpoint->endpoint_id;
|
||
|
struct ipa *ipa = endpoint->ipa;
|
||
|
const struct ipa_reg *reg;
|
||
|
u32 offset;
|
||
|
u32 val;
|
||
|
|
||
|
reg = ipa_reg(ipa, ENDP_FILTER_ROUTER_HSH_CFG);
|
||
|
|
||
|
offset = ipa_reg_n_offset(reg, endpoint_id);
|
||
|
val = ioread32(endpoint->ipa->reg_virt + offset);
|
||
|
|
||
|
/* Zero all filter-related fields, preserving the rest */
|
||
|
val &= ~ipa_reg_fmask(reg, FILTER_HASH_MSK_ALL);
|
||
|
|
||
|
iowrite32(val, endpoint->ipa->reg_virt + offset);
|
||
|
}
|
||
|
|
||
|
/* Configure a hashed filter table; there is no ipa_filter_deconfig() */
|
||
|
static void ipa_filter_config(struct ipa *ipa, bool modem)
|
||
|
{
|
||
|
enum gsi_ee_id ee_id = modem ? GSI_EE_MODEM : GSI_EE_AP;
|
||
|
u32 ep_mask = ipa->filter_map;
|
||
|
|
||
|
if (!ipa_table_hash_support(ipa))
|
||
|
return;
|
||
|
|
||
|
while (ep_mask) {
|
||
|
u32 endpoint_id = __ffs(ep_mask);
|
||
|
struct ipa_endpoint *endpoint;
|
||
|
|
||
|
ep_mask ^= BIT(endpoint_id);
|
||
|
|
||
|
endpoint = &ipa->endpoint[endpoint_id];
|
||
|
if (endpoint->ee_id == ee_id)
|
||
|
ipa_filter_tuple_zero(endpoint);
|
||
|
}
|
||
|
}
|
||
|
|
||
|
static bool ipa_route_id_modem(u32 route_id)
|
||
|
{
|
||
|
return route_id >= IPA_ROUTE_MODEM_MIN &&
|
||
|
route_id <= IPA_ROUTE_MODEM_MIN + IPA_ROUTE_MODEM_COUNT - 1;
|
||
|
}
|
||
|
|
||
|
/**
|
||
|
* ipa_route_tuple_zero() - Zero a hashed route table entry tuple
|
||
|
* @ipa: IPA pointer
|
||
|
* @route_id: Route table entry whose hash tuple should be zeroed
|
||
|
*
|
||
|
* Updates the route hash values without changing filter ones.
|
||
|
*/
|
||
|
static void ipa_route_tuple_zero(struct ipa *ipa, u32 route_id)
|
||
|
{
|
||
|
const struct ipa_reg *reg;
|
||
|
u32 offset;
|
||
|
u32 val;
|
||
|
|
||
|
reg = ipa_reg(ipa, ENDP_FILTER_ROUTER_HSH_CFG);
|
||
|
offset = ipa_reg_n_offset(reg, route_id);
|
||
|
|
||
|
val = ioread32(ipa->reg_virt + offset);
|
||
|
|
||
|
/* Zero all route-related fields, preserving the rest */
|
||
|
val &= ~ipa_reg_fmask(reg, ROUTER_HASH_MSK_ALL);
|
||
|
|
||
|
iowrite32(val, ipa->reg_virt + offset);
|
||
|
}
|
||
|
|
||
|
/* Configure a hashed route table; there is no ipa_route_deconfig() */
|
||
|
static void ipa_route_config(struct ipa *ipa, bool modem)
|
||
|
{
|
||
|
u32 route_id;
|
||
|
|
||
|
if (!ipa_table_hash_support(ipa))
|
||
|
return;
|
||
|
|
||
|
for (route_id = 0; route_id < IPA_ROUTE_COUNT_MAX; route_id++)
|
||
|
if (ipa_route_id_modem(route_id) == modem)
|
||
|
ipa_route_tuple_zero(ipa, route_id);
|
||
|
}
|
||
|
|
||
|
/* Configure a filter and route tables; there is no ipa_table_deconfig() */
|
||
|
void ipa_table_config(struct ipa *ipa)
|
||
|
{
|
||
|
ipa_filter_config(ipa, false);
|
||
|
ipa_filter_config(ipa, true);
|
||
|
ipa_route_config(ipa, false);
|
||
|
ipa_route_config(ipa, true);
|
||
|
}
|
||
|
|
||
|
/*
|
||
|
* Initialize a coherent DMA allocation containing initialized filter and
|
||
|
* route table data. This is used when initializing or resetting the IPA
|
||
|
* filter or route table.
|
||
|
*
|
||
|
* The first entry in a filter table contains a bitmap indicating which
|
||
|
* endpoints contain entries in the table. In addition to that first entry,
|
||
|
* there are at most IPA_FILTER_COUNT_MAX entries that follow. Filter table
|
||
|
* entries are 64 bits wide, and (other than the bitmap) contain the DMA
|
||
|
* address of a filter rule. A "zero rule" indicates no filtering, and
|
||
|
* consists of 64 bits of zeroes. When a filter table is initialized (or
|
||
|
* reset) its entries are made to refer to the zero rule.
|
||
|
*
|
||
|
* Each entry in a route table is the DMA address of a routing rule. For
|
||
|
* routing there is also a 64-bit "zero rule" that means no routing, and
|
||
|
* when a route table is initialized or reset, its entries are made to refer
|
||
|
* to the zero rule. The zero rule is shared for route and filter tables.
|
||
|
*
|
||
|
* Note that the IPA hardware requires a filter or route rule address to be
|
||
|
* aligned on a 128 byte boundary. The coherent DMA buffer we allocate here
|
||
|
* has a minimum alignment, and we place the zero rule at the base of that
|
||
|
* allocated space. In ipa_table_init() we verify the minimum DMA allocation
|
||
|
* meets our requirement.
|
||
|
*
|
||
|
* +-------------------+
|
||
|
* --> | zero rule |
|
||
|
* / |-------------------|
|
||
|
* | | filter mask |
|
||
|
* |\ |-------------------|
|
||
|
* | ---- zero rule address | \
|
||
|
* |\ |-------------------| |
|
||
|
* | ---- zero rule address | | IPA_FILTER_COUNT_MAX
|
||
|
* | |-------------------| > or IPA_ROUTE_COUNT_MAX,
|
||
|
* | ... | whichever is greater
|
||
|
* \ |-------------------| |
|
||
|
* ---- zero rule address | /
|
||
|
* +-------------------+
|
||
|
*/
|
||
|
int ipa_table_init(struct ipa *ipa)
|
||
|
{
|
||
|
u32 count = max_t(u32, IPA_FILTER_COUNT_MAX, IPA_ROUTE_COUNT_MAX);
|
||
|
struct device *dev = &ipa->pdev->dev;
|
||
|
dma_addr_t addr;
|
||
|
__le64 le_addr;
|
||
|
__le64 *virt;
|
||
|
size_t size;
|
||
|
|
||
|
ipa_table_validate_build();
|
||
|
|
||
|
/* The IPA hardware requires route and filter table rules to be
|
||
|
* aligned on a 128-byte boundary. We put the "zero rule" at the
|
||
|
* base of the table area allocated here. The DMA address returned
|
||
|
* by dma_alloc_coherent() is guaranteed to be a power-of-2 number
|
||
|
* of pages, which satisfies the rule alignment requirement.
|
||
|
*/
|
||
|
size = IPA_ZERO_RULE_SIZE + (1 + count) * sizeof(__le64);
|
||
|
virt = dma_alloc_coherent(dev, size, &addr, GFP_KERNEL);
|
||
|
if (!virt)
|
||
|
return -ENOMEM;
|
||
|
|
||
|
ipa->table_virt = virt;
|
||
|
ipa->table_addr = addr;
|
||
|
|
||
|
/* First slot is the zero rule */
|
||
|
*virt++ = 0;
|
||
|
|
||
|
/* Next is the filter table bitmap. The "soft" bitmap value
|
||
|
* must be converted to the hardware representation by shifting
|
||
|
* it left one position. (Bit 0 repesents global filtering,
|
||
|
* which is possible but not used.)
|
||
|
*/
|
||
|
*virt++ = cpu_to_le64((u64)ipa->filter_map << 1);
|
||
|
|
||
|
/* All the rest contain the DMA address of the zero rule */
|
||
|
le_addr = cpu_to_le64(addr);
|
||
|
while (count--)
|
||
|
*virt++ = le_addr;
|
||
|
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
void ipa_table_exit(struct ipa *ipa)
|
||
|
{
|
||
|
u32 count = max_t(u32, 1 + IPA_FILTER_COUNT_MAX, IPA_ROUTE_COUNT_MAX);
|
||
|
struct device *dev = &ipa->pdev->dev;
|
||
|
size_t size;
|
||
|
|
||
|
size = IPA_ZERO_RULE_SIZE + (1 + count) * sizeof(__le64);
|
||
|
|
||
|
dma_free_coherent(dev, size, ipa->table_virt, ipa->table_addr);
|
||
|
ipa->table_addr = 0;
|
||
|
ipa->table_virt = NULL;
|
||
|
}
|