419 lines
10 KiB
C
419 lines
10 KiB
C
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// SPDX-License-Identifier: GPL-2.0-only
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#include <linux/bitfield.h>
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#include <linux/clk.h>
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#include <linux/hwmon.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/mod_devicetable.h>
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#include <linux/platform_device.h>
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#include <linux/polynomial.h>
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#include <linux/regmap.h>
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/*
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* The original translation formulae of the temperature (in degrees of Celsius)
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* are as follows:
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*
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* T = -3.4627e-11*(N^4) + 1.1023e-7*(N^3) + -1.9165e-4*(N^2) +
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* 3.0604e-1*(N^1) + -5.6197e1
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*
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* where [-56.197, 136.402]C and N = [0, 1023].
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*
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* They must be accordingly altered to be suitable for the integer arithmetics.
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* The technique is called 'factor redistribution', which just makes sure the
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* multiplications and divisions are made so to have a result of the operations
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* within the integer numbers limit. In addition we need to translate the
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* formulae to accept millidegrees of Celsius. Here what it looks like after
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* the alterations:
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*
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* T = -34627e-12*(N^4) + 110230e-9*(N^3) + -191650e-6*(N^2) +
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* 306040e-3*(N^1) + -56197
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*
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* where T = [-56197, 136402]mC and N = [0, 1023].
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*/
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static const struct polynomial poly_N_to_temp = {
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.terms = {
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{4, -34627, 1000, 1},
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{3, 110230, 1000, 1},
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{2, -191650, 1000, 1},
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{1, 306040, 1000, 1},
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{0, -56197, 1, 1}
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}
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};
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#define PVT_SENSOR_CTRL 0x0 /* unused */
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#define PVT_SENSOR_CFG 0x4
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#define SENSOR_CFG_CLK_CFG GENMASK(27, 20)
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#define SENSOR_CFG_TRIM_VAL GENMASK(13, 9)
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#define SENSOR_CFG_SAMPLE_ENA BIT(8)
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#define SENSOR_CFG_START_CAPTURE BIT(7)
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#define SENSOR_CFG_CONTINIOUS_MODE BIT(6)
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#define SENSOR_CFG_PSAMPLE_ENA GENMASK(1, 0)
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#define PVT_SENSOR_STAT 0x8
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#define SENSOR_STAT_DATA_VALID BIT(10)
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#define SENSOR_STAT_DATA GENMASK(9, 0)
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#define FAN_CFG 0x0
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#define FAN_CFG_DUTY_CYCLE GENMASK(23, 16)
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#define INV_POL BIT(3)
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#define GATE_ENA BIT(2)
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#define PWM_OPEN_COL_ENA BIT(1)
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#define FAN_STAT_CFG BIT(0)
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#define FAN_PWM_FREQ 0x4
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#define FAN_PWM_CYC_10US GENMASK(25, 15)
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#define FAN_PWM_FREQ_FREQ GENMASK(14, 0)
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#define FAN_CNT 0xc
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#define FAN_CNT_DATA GENMASK(15, 0)
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#define LAN966X_PVT_CLK 1200000 /* 1.2 MHz */
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struct lan966x_hwmon {
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struct regmap *regmap_pvt;
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struct regmap *regmap_fan;
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struct clk *clk;
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unsigned long clk_rate;
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};
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static int lan966x_hwmon_read_temp(struct device *dev, long *val)
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{
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struct lan966x_hwmon *hwmon = dev_get_drvdata(dev);
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unsigned int data;
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int ret;
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ret = regmap_read(hwmon->regmap_pvt, PVT_SENSOR_STAT, &data);
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if (ret < 0)
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return ret;
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if (!(data & SENSOR_STAT_DATA_VALID))
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return -ENODATA;
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*val = polynomial_calc(&poly_N_to_temp,
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FIELD_GET(SENSOR_STAT_DATA, data));
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return 0;
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}
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static int lan966x_hwmon_read_fan(struct device *dev, long *val)
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{
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struct lan966x_hwmon *hwmon = dev_get_drvdata(dev);
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unsigned int data;
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int ret;
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ret = regmap_read(hwmon->regmap_fan, FAN_CNT, &data);
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if (ret < 0)
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return ret;
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/*
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* Data is given in pulses per second. Assume two pulses
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* per revolution.
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*/
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*val = FIELD_GET(FAN_CNT_DATA, data) * 60 / 2;
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return 0;
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}
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static int lan966x_hwmon_read_pwm(struct device *dev, long *val)
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{
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struct lan966x_hwmon *hwmon = dev_get_drvdata(dev);
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unsigned int data;
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int ret;
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ret = regmap_read(hwmon->regmap_fan, FAN_CFG, &data);
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if (ret < 0)
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return ret;
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*val = FIELD_GET(FAN_CFG_DUTY_CYCLE, data);
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return 0;
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}
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static int lan966x_hwmon_read_pwm_freq(struct device *dev, long *val)
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{
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struct lan966x_hwmon *hwmon = dev_get_drvdata(dev);
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unsigned long tmp;
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unsigned int data;
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int ret;
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ret = regmap_read(hwmon->regmap_fan, FAN_PWM_FREQ, &data);
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if (ret < 0)
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return ret;
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/*
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* Datasheet says it is sys_clk / 256 / pwm_freq. But in reality
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* it is sys_clk / 256 / (pwm_freq + 1).
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*/
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data = FIELD_GET(FAN_PWM_FREQ_FREQ, data) + 1;
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tmp = DIV_ROUND_CLOSEST(hwmon->clk_rate, 256);
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*val = DIV_ROUND_CLOSEST(tmp, data);
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return 0;
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}
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static int lan966x_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
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u32 attr, int channel, long *val)
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{
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switch (type) {
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case hwmon_temp:
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return lan966x_hwmon_read_temp(dev, val);
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case hwmon_fan:
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return lan966x_hwmon_read_fan(dev, val);
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case hwmon_pwm:
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switch (attr) {
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case hwmon_pwm_input:
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return lan966x_hwmon_read_pwm(dev, val);
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case hwmon_pwm_freq:
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return lan966x_hwmon_read_pwm_freq(dev, val);
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default:
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return -EOPNOTSUPP;
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}
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default:
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return -EOPNOTSUPP;
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}
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}
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static int lan966x_hwmon_write_pwm(struct device *dev, long val)
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{
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struct lan966x_hwmon *hwmon = dev_get_drvdata(dev);
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if (val < 0 || val > 255)
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return -EINVAL;
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return regmap_update_bits(hwmon->regmap_fan, FAN_CFG,
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FAN_CFG_DUTY_CYCLE,
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FIELD_PREP(FAN_CFG_DUTY_CYCLE, val));
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}
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static int lan966x_hwmon_write_pwm_freq(struct device *dev, long val)
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{
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struct lan966x_hwmon *hwmon = dev_get_drvdata(dev);
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if (val <= 0)
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return -EINVAL;
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val = DIV_ROUND_CLOSEST(hwmon->clk_rate, val);
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val = DIV_ROUND_CLOSEST(val, 256) - 1;
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val = clamp_val(val, 0, FAN_PWM_FREQ_FREQ);
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return regmap_update_bits(hwmon->regmap_fan, FAN_PWM_FREQ,
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FAN_PWM_FREQ_FREQ,
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FIELD_PREP(FAN_PWM_FREQ_FREQ, val));
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}
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static int lan966x_hwmon_write(struct device *dev, enum hwmon_sensor_types type,
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u32 attr, int channel, long val)
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{
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switch (type) {
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case hwmon_pwm:
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switch (attr) {
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case hwmon_pwm_input:
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return lan966x_hwmon_write_pwm(dev, val);
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case hwmon_pwm_freq:
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return lan966x_hwmon_write_pwm_freq(dev, val);
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default:
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return -EOPNOTSUPP;
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}
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default:
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return -EOPNOTSUPP;
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}
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}
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static umode_t lan966x_hwmon_is_visible(const void *data,
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enum hwmon_sensor_types type,
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u32 attr, int channel)
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{
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umode_t mode = 0;
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switch (type) {
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case hwmon_temp:
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switch (attr) {
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case hwmon_temp_input:
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mode = 0444;
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break;
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default:
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break;
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}
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break;
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case hwmon_fan:
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switch (attr) {
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case hwmon_fan_input:
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mode = 0444;
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break;
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default:
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break;
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}
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break;
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case hwmon_pwm:
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switch (attr) {
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case hwmon_pwm_input:
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case hwmon_pwm_freq:
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mode = 0644;
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break;
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default:
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break;
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}
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break;
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default:
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break;
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}
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return mode;
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}
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static const struct hwmon_channel_info *lan966x_hwmon_info[] = {
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HWMON_CHANNEL_INFO(chip, HWMON_C_REGISTER_TZ),
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HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT),
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HWMON_CHANNEL_INFO(fan, HWMON_F_INPUT),
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HWMON_CHANNEL_INFO(pwm, HWMON_PWM_INPUT | HWMON_PWM_FREQ),
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NULL
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};
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static const struct hwmon_ops lan966x_hwmon_ops = {
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.is_visible = lan966x_hwmon_is_visible,
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.read = lan966x_hwmon_read,
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.write = lan966x_hwmon_write,
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};
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static const struct hwmon_chip_info lan966x_hwmon_chip_info = {
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.ops = &lan966x_hwmon_ops,
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.info = lan966x_hwmon_info,
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};
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static void lan966x_hwmon_disable(void *data)
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{
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struct lan966x_hwmon *hwmon = data;
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regmap_update_bits(hwmon->regmap_pvt, PVT_SENSOR_CFG,
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SENSOR_CFG_SAMPLE_ENA | SENSOR_CFG_CONTINIOUS_MODE,
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0);
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}
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static int lan966x_hwmon_enable(struct device *dev,
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struct lan966x_hwmon *hwmon)
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{
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unsigned int mask = SENSOR_CFG_CLK_CFG |
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SENSOR_CFG_SAMPLE_ENA |
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SENSOR_CFG_START_CAPTURE |
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SENSOR_CFG_CONTINIOUS_MODE |
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SENSOR_CFG_PSAMPLE_ENA;
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unsigned int val;
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unsigned int div;
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int ret;
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/* enable continuous mode */
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val = SENSOR_CFG_SAMPLE_ENA | SENSOR_CFG_CONTINIOUS_MODE;
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/* set PVT clock to be between 1.15 and 1.25 MHz */
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div = DIV_ROUND_CLOSEST(hwmon->clk_rate, LAN966X_PVT_CLK);
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val |= FIELD_PREP(SENSOR_CFG_CLK_CFG, div);
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ret = regmap_update_bits(hwmon->regmap_pvt, PVT_SENSOR_CFG,
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mask, val);
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if (ret)
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return ret;
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return devm_add_action_or_reset(dev, lan966x_hwmon_disable, hwmon);
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}
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static struct regmap *lan966x_init_regmap(struct platform_device *pdev,
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const char *name)
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{
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struct regmap_config regmap_config = {
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.reg_bits = 32,
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.reg_stride = 4,
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.val_bits = 32,
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};
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void __iomem *base;
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base = devm_platform_ioremap_resource_byname(pdev, name);
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if (IS_ERR(base))
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return ERR_CAST(base);
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regmap_config.name = name;
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return devm_regmap_init_mmio(&pdev->dev, base, ®map_config);
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}
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static void lan966x_clk_disable(void *data)
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{
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struct lan966x_hwmon *hwmon = data;
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clk_disable_unprepare(hwmon->clk);
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}
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static int lan966x_clk_enable(struct device *dev, struct lan966x_hwmon *hwmon)
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{
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int ret;
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ret = clk_prepare_enable(hwmon->clk);
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if (ret)
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return ret;
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return devm_add_action_or_reset(dev, lan966x_clk_disable, hwmon);
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}
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static int lan966x_hwmon_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct lan966x_hwmon *hwmon;
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struct device *hwmon_dev;
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int ret;
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hwmon = devm_kzalloc(dev, sizeof(*hwmon), GFP_KERNEL);
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if (!hwmon)
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return -ENOMEM;
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hwmon->clk = devm_clk_get(dev, NULL);
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if (IS_ERR(hwmon->clk))
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return dev_err_probe(dev, PTR_ERR(hwmon->clk),
|
||
|
|
"failed to get clock\n");
|
||
|
|
|
||
|
|
ret = lan966x_clk_enable(dev, hwmon);
|
||
|
|
if (ret)
|
||
|
|
return dev_err_probe(dev, ret, "failed to enable clock\n");
|
||
|
|
|
||
|
|
hwmon->clk_rate = clk_get_rate(hwmon->clk);
|
||
|
|
|
||
|
|
hwmon->regmap_pvt = lan966x_init_regmap(pdev, "pvt");
|
||
|
|
if (IS_ERR(hwmon->regmap_pvt))
|
||
|
|
return dev_err_probe(dev, PTR_ERR(hwmon->regmap_pvt),
|
||
|
|
"failed to get regmap for PVT registers\n");
|
||
|
|
|
||
|
|
hwmon->regmap_fan = lan966x_init_regmap(pdev, "fan");
|
||
|
|
if (IS_ERR(hwmon->regmap_fan))
|
||
|
|
return dev_err_probe(dev, PTR_ERR(hwmon->regmap_fan),
|
||
|
|
"failed to get regmap for fan registers\n");
|
||
|
|
|
||
|
|
ret = lan966x_hwmon_enable(dev, hwmon);
|
||
|
|
if (ret)
|
||
|
|
return dev_err_probe(dev, ret, "failed to enable sensor\n");
|
||
|
|
|
||
|
|
hwmon_dev = devm_hwmon_device_register_with_info(&pdev->dev,
|
||
|
|
"lan966x_hwmon", hwmon,
|
||
|
|
&lan966x_hwmon_chip_info, NULL);
|
||
|
|
if (IS_ERR(hwmon_dev))
|
||
|
|
return dev_err_probe(dev, PTR_ERR(hwmon_dev),
|
||
|
|
"failed to register hwmon device\n");
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static const struct of_device_id lan966x_hwmon_of_match[] = {
|
||
|
|
{ .compatible = "microchip,lan9668-hwmon" },
|
||
|
|
{}
|
||
|
|
};
|
||
|
|
MODULE_DEVICE_TABLE(of, lan966x_hwmon_of_match);
|
||
|
|
|
||
|
|
static struct platform_driver lan966x_hwmon_driver = {
|
||
|
|
.probe = lan966x_hwmon_probe,
|
||
|
|
.driver = {
|
||
|
|
.name = "lan966x-hwmon",
|
||
|
|
.of_match_table = lan966x_hwmon_of_match,
|
||
|
|
},
|
||
|
|
};
|
||
|
|
module_platform_driver(lan966x_hwmon_driver);
|
||
|
|
|
||
|
|
MODULE_DESCRIPTION("LAN966x Hardware Monitoring Driver");
|
||
|
|
MODULE_AUTHOR("Michael Walle <michael@walle.cc>");
|
||
|
|
MODULE_LICENSE("GPL");
|