51 lines
1.5 KiB
C
51 lines
1.5 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_X86_INVPCID
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#define _ASM_X86_INVPCID
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static inline void __invpcid(unsigned long pcid, unsigned long addr,
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unsigned long type)
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{
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struct { u64 d[2]; } desc = { { pcid, addr } };
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/*
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* The memory clobber is because the whole point is to invalidate
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* stale TLB entries and, especially if we're flushing global
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* mappings, we don't want the compiler to reorder any subsequent
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* memory accesses before the TLB flush.
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*/
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asm volatile("invpcid %[desc], %[type]"
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:: [desc] "m" (desc), [type] "r" (type) : "memory");
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}
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#define INVPCID_TYPE_INDIV_ADDR 0
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#define INVPCID_TYPE_SINGLE_CTXT 1
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#define INVPCID_TYPE_ALL_INCL_GLOBAL 2
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#define INVPCID_TYPE_ALL_NON_GLOBAL 3
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/* Flush all mappings for a given pcid and addr, not including globals. */
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static inline void invpcid_flush_one(unsigned long pcid,
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unsigned long addr)
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{
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__invpcid(pcid, addr, INVPCID_TYPE_INDIV_ADDR);
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}
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/* Flush all mappings for a given PCID, not including globals. */
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static inline void invpcid_flush_single_context(unsigned long pcid)
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{
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__invpcid(pcid, 0, INVPCID_TYPE_SINGLE_CTXT);
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}
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/* Flush all mappings, including globals, for all PCIDs. */
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static inline void invpcid_flush_all(void)
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{
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__invpcid(0, 0, INVPCID_TYPE_ALL_INCL_GLOBAL);
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}
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/* Flush all mappings for all PCIDs except globals. */
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static inline void invpcid_flush_all_nonglobals(void)
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{
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__invpcid(0, 0, INVPCID_TYPE_ALL_NON_GLOBAL);
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}
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#endif /* _ASM_X86_INVPCID */
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