128 lines
2.7 KiB
C
128 lines
2.7 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_PARISC_FUTEX_H
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#define _ASM_PARISC_FUTEX_H
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#include <linux/futex.h>
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#include <linux/uaccess.h>
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#include <asm/atomic.h>
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#include <asm/errno.h>
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/* The following has to match the LWS code in syscall.S. We have
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* 256 four-word locks. We use bits 20-27 of the futex virtual
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* address for the hash index.
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*/
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static inline unsigned long _futex_hash_index(unsigned long ua)
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{
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return (ua >> 2) & 0x3fc;
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}
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static inline void
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_futex_spin_lock_irqsave(arch_spinlock_t *s, unsigned long *flags)
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{
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local_irq_save(*flags);
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arch_spin_lock(s);
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}
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static inline void
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_futex_spin_unlock_irqrestore(arch_spinlock_t *s, unsigned long *flags)
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{
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arch_spin_unlock(s);
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local_irq_restore(*flags);
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}
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static inline int
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arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *uaddr)
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{
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extern u32 lws_lock_start[];
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unsigned long ua = (unsigned long)uaddr;
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arch_spinlock_t *s;
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unsigned long flags;
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int oldval, ret;
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u32 tmp;
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s = (arch_spinlock_t *)&lws_lock_start[_futex_hash_index(ua)];
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_futex_spin_lock_irqsave(s, &flags);
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/* Return -EFAULT if we encounter a page fault or COW break */
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if (unlikely(get_user(oldval, uaddr) != 0)) {
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ret = -EFAULT;
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goto out_pagefault_enable;
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}
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ret = 0;
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tmp = oldval;
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switch (op) {
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case FUTEX_OP_SET:
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tmp = oparg;
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break;
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case FUTEX_OP_ADD:
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tmp += oparg;
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break;
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case FUTEX_OP_OR:
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tmp |= oparg;
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break;
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case FUTEX_OP_ANDN:
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tmp &= ~oparg;
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break;
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case FUTEX_OP_XOR:
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tmp ^= oparg;
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break;
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default:
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ret = -ENOSYS;
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goto out_pagefault_enable;
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}
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if (unlikely(put_user(tmp, uaddr) != 0))
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ret = -EFAULT;
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out_pagefault_enable:
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_futex_spin_unlock_irqrestore(s, &flags);
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if (!ret)
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*oval = oldval;
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return ret;
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}
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static inline int
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futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
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u32 oldval, u32 newval)
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{
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extern u32 lws_lock_start[];
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unsigned long ua = (unsigned long)uaddr;
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arch_spinlock_t *s;
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u32 val;
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unsigned long flags;
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if (!access_ok(uaddr, sizeof(u32)))
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return -EFAULT;
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/* HPPA has no cmpxchg in hardware and therefore the
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* best we can do here is use an array of locks. The
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* lock selected is based on a hash of the virtual
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* address of the futex. This should scale to a couple
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* of CPUs.
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*/
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s = (arch_spinlock_t *)&lws_lock_start[_futex_hash_index(ua)];
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_futex_spin_lock_irqsave(s, &flags);
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if (unlikely(get_user(val, uaddr) != 0)) {
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_futex_spin_unlock_irqrestore(s, &flags);
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return -EFAULT;
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}
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if (val == oldval && unlikely(put_user(newval, uaddr) != 0)) {
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_futex_spin_unlock_irqrestore(s, &flags);
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return -EFAULT;
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}
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*uval = val;
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_futex_spin_unlock_irqrestore(s, &flags);
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return 0;
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}
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#endif /*_ASM_PARISC_FUTEX_H*/
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