512 lines
12 KiB
C
512 lines
12 KiB
C
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/***********************license start***************
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* Author: Cavium Networks
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*
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* Contact: support@caviumnetworks.com
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* This file is part of the OCTEON SDK
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*
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* Copyright (c) 2003-2017 Cavium, Inc.
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*
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* This file is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, Version 2, as
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* published by the Free Software Foundation.
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*
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* This file is distributed in the hope that it will be useful, but
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* AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
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* NONINFRINGEMENT. See the GNU General Public License for more
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* details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this file; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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* or visit http://www.gnu.org/licenses/.
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*
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* This file may also be available under a different license from Cavium.
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* Contact Cavium Networks for more information
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***********************license end**************************************/
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#include <asm/octeon/octeon.h>
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enum octeon_feature_bits __octeon_feature_bits __read_mostly;
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EXPORT_SYMBOL_GPL(__octeon_feature_bits);
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/**
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* Read a byte of fuse data
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* @byte_addr: address to read
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*
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* Returns fuse value: 0 or 1
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*/
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static uint8_t __init cvmx_fuse_read_byte(int byte_addr)
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{
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union cvmx_mio_fus_rcmd read_cmd;
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read_cmd.u64 = 0;
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read_cmd.s.addr = byte_addr;
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read_cmd.s.pend = 1;
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cvmx_write_csr(CVMX_MIO_FUS_RCMD, read_cmd.u64);
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while ((read_cmd.u64 = cvmx_read_csr(CVMX_MIO_FUS_RCMD))
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&& read_cmd.s.pend)
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;
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return read_cmd.s.dat;
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}
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/*
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* Version of octeon_model_get_string() that takes buffer as argument,
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* as running early in u-boot static/global variables don't work when
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* running from flash.
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*/
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static const char *__init octeon_model_get_string_buffer(uint32_t chip_id,
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char *buffer)
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{
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const char *family;
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const char *core_model;
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char pass[4];
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int clock_mhz;
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const char *suffix;
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int num_cores;
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union cvmx_mio_fus_dat2 fus_dat2;
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union cvmx_mio_fus_dat3 fus_dat3;
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char fuse_model[10];
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uint32_t fuse_data = 0;
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uint64_t l2d_fus3 = 0;
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if (OCTEON_IS_MODEL(OCTEON_CN3XXX) || OCTEON_IS_MODEL(OCTEON_CN5XXX))
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l2d_fus3 = (cvmx_read_csr(CVMX_L2D_FUS3) >> 34) & 0x3;
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fus_dat2.u64 = cvmx_read_csr(CVMX_MIO_FUS_DAT2);
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fus_dat3.u64 = cvmx_read_csr(CVMX_MIO_FUS_DAT3);
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num_cores = cvmx_octeon_num_cores();
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/* Make sure the non existent devices look disabled */
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switch ((chip_id >> 8) & 0xff) {
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case 6: /* CN50XX */
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case 2: /* CN30XX */
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fus_dat3.s.nodfa_dte = 1;
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fus_dat3.s.nozip = 1;
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break;
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case 4: /* CN57XX or CN56XX */
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fus_dat3.s.nodfa_dte = 1;
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break;
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default:
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break;
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}
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/* Make a guess at the suffix */
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/* NSP = everything */
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/* EXP = No crypto */
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/* SCP = No DFA, No zip */
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/* CP = No DFA, No crypto, No zip */
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if (fus_dat3.s.nodfa_dte) {
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if (fus_dat2.s.nocrypto)
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suffix = "CP";
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else
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suffix = "SCP";
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} else if (fus_dat2.s.nocrypto)
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suffix = "EXP";
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else
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suffix = "NSP";
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if (!fus_dat2.s.nocrypto)
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__octeon_feature_bits |= OCTEON_HAS_CRYPTO;
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/*
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* Assume pass number is encoded using <5:3><2:0>. Exceptions
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* will be fixed later.
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*/
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sprintf(pass, "%d.%d", (int)((chip_id >> 3) & 7) + 1, (int)chip_id & 7);
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/*
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* Use the number of cores to determine the last 2 digits of
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* the model number. There are some exceptions that are fixed
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* later.
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*/
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switch (num_cores) {
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case 48:
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core_model = "90";
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break;
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case 44:
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core_model = "88";
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break;
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case 40:
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core_model = "85";
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break;
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case 32:
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core_model = "80";
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break;
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case 24:
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core_model = "70";
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break;
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case 16:
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core_model = "60";
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break;
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case 15:
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core_model = "58";
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break;
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case 14:
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core_model = "55";
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break;
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case 13:
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core_model = "52";
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break;
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case 12:
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core_model = "50";
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break;
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case 11:
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core_model = "48";
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break;
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case 10:
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core_model = "45";
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break;
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case 9:
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core_model = "42";
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break;
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case 8:
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core_model = "40";
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break;
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case 7:
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core_model = "38";
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break;
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case 6:
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core_model = "34";
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break;
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case 5:
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core_model = "32";
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break;
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case 4:
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core_model = "30";
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break;
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case 3:
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core_model = "25";
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break;
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case 2:
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core_model = "20";
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break;
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case 1:
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core_model = "10";
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break;
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default:
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core_model = "XX";
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break;
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}
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/* Now figure out the family, the first two digits */
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switch ((chip_id >> 8) & 0xff) {
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case 0: /* CN38XX, CN37XX or CN36XX */
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if (l2d_fus3) {
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/*
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* For some unknown reason, the 16 core one is
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* called 37 instead of 36.
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*/
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if (num_cores >= 16)
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family = "37";
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else
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family = "36";
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} else
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family = "38";
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/*
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* This series of chips didn't follow the standard
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* pass numbering.
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*/
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switch (chip_id & 0xf) {
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case 0:
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strcpy(pass, "1.X");
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break;
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case 1:
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strcpy(pass, "2.X");
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break;
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case 3:
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strcpy(pass, "3.X");
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break;
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default:
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strcpy(pass, "X.X");
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break;
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}
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break;
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case 1: /* CN31XX or CN3020 */
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if ((chip_id & 0x10) || l2d_fus3)
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family = "30";
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else
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family = "31";
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/*
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* This series of chips didn't follow the standard
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* pass numbering.
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*/
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switch (chip_id & 0xf) {
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case 0:
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strcpy(pass, "1.0");
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break;
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case 2:
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strcpy(pass, "1.1");
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break;
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default:
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strcpy(pass, "X.X");
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break;
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}
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break;
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case 2: /* CN3010 or CN3005 */
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family = "30";
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/* A chip with half cache is an 05 */
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if (l2d_fus3)
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core_model = "05";
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/*
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* This series of chips didn't follow the standard
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* pass numbering.
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*/
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switch (chip_id & 0xf) {
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case 0:
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strcpy(pass, "1.0");
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break;
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case 2:
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strcpy(pass, "1.1");
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break;
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default:
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strcpy(pass, "X.X");
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break;
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}
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break;
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case 3: /* CN58XX */
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family = "58";
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/* Special case. 4 core, half cache (CP with half cache) */
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if ((num_cores == 4) && l2d_fus3 && !strncmp(suffix, "CP", 2))
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core_model = "29";
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/* Pass 1 uses different encodings for pass numbers */
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if ((chip_id & 0xFF) < 0x8) {
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switch (chip_id & 0x3) {
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case 0:
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strcpy(pass, "1.0");
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break;
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case 1:
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strcpy(pass, "1.1");
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break;
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case 3:
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strcpy(pass, "1.2");
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break;
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default:
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strcpy(pass, "1.X");
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break;
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}
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}
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break;
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case 4: /* CN57XX, CN56XX, CN55XX, CN54XX */
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if (fus_dat2.cn56xx.raid_en) {
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if (l2d_fus3)
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family = "55";
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else
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family = "57";
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if (fus_dat2.cn56xx.nocrypto)
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suffix = "SP";
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else
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suffix = "SSP";
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} else {
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if (fus_dat2.cn56xx.nocrypto)
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suffix = "CP";
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else {
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suffix = "NSP";
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if (fus_dat3.s.nozip)
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suffix = "SCP";
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if (fus_dat3.cn38xx.bar2_en)
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suffix = "NSPB2";
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}
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if (l2d_fus3)
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family = "54";
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else
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family = "56";
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}
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break;
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case 6: /* CN50XX */
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family = "50";
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break;
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case 7: /* CN52XX */
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if (l2d_fus3)
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family = "51";
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else
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family = "52";
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break;
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case 0x93: /* CN61XX */
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family = "61";
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if (fus_dat2.cn61xx.nocrypto && fus_dat2.cn61xx.dorm_crypto)
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suffix = "AP";
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if (fus_dat2.cn61xx.nocrypto)
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suffix = "CP";
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else if (fus_dat2.cn61xx.dorm_crypto)
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suffix = "DAP";
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else if (fus_dat3.cn61xx.nozip)
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suffix = "SCP";
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break;
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case 0x90: /* CN63XX */
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family = "63";
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if (fus_dat3.s.l2c_crip == 2)
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family = "62";
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if (num_cores == 6) /* Other core counts match generic */
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core_model = "35";
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if (fus_dat2.cn63xx.nocrypto)
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suffix = "CP";
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else if (fus_dat2.cn63xx.dorm_crypto)
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suffix = "DAP";
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else if (fus_dat3.cn61xx.nozip)
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suffix = "SCP";
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else
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suffix = "AAP";
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break;
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case 0x92: /* CN66XX */
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family = "66";
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if (num_cores == 6) /* Other core counts match generic */
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core_model = "35";
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if (fus_dat2.cn66xx.nocrypto && fus_dat2.cn66xx.dorm_crypto)
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suffix = "AP";
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if (fus_dat2.cn66xx.nocrypto)
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suffix = "CP";
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else if (fus_dat2.cn66xx.dorm_crypto)
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suffix = "DAP";
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else if (fus_dat3.cn61xx.nozip)
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suffix = "SCP";
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else
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suffix = "AAP";
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break;
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case 0x91: /* CN68XX */
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family = "68";
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if (fus_dat2.cn68xx.nocrypto && fus_dat3.cn61xx.nozip)
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suffix = "CP";
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else if (fus_dat2.cn68xx.dorm_crypto)
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suffix = "DAP";
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else if (fus_dat3.cn61xx.nozip)
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suffix = "SCP";
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else if (fus_dat2.cn68xx.nocrypto)
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suffix = "SP";
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else
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suffix = "AAP";
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break;
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case 0x94: /* CNF71XX */
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family = "F71";
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if (fus_dat3.cn61xx.nozip)
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suffix = "SCP";
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else
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suffix = "AAP";
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||
|
|
break;
|
||
|
|
case 0x95: /* CN78XX */
|
||
|
|
if (num_cores == 6) /* Other core counts match generic */
|
||
|
|
core_model = "35";
|
||
|
|
if (OCTEON_IS_MODEL(OCTEON_CN76XX))
|
||
|
|
family = "76";
|
||
|
|
else
|
||
|
|
family = "78";
|
||
|
|
if (fus_dat3.cn78xx.l2c_crip == 2)
|
||
|
|
family = "77";
|
||
|
|
if (fus_dat3.cn78xx.nozip
|
||
|
|
&& fus_dat3.cn78xx.nodfa_dte
|
||
|
|
&& fus_dat3.cn78xx.nohna_dte) {
|
||
|
|
if (fus_dat3.cn78xx.nozip &&
|
||
|
|
!fus_dat2.cn78xx.raid_en &&
|
||
|
|
fus_dat3.cn78xx.nohna_dte) {
|
||
|
|
suffix = "CP";
|
||
|
|
} else {
|
||
|
|
suffix = "SCP";
|
||
|
|
}
|
||
|
|
} else if (fus_dat2.cn78xx.raid_en == 0)
|
||
|
|
suffix = "HCP";
|
||
|
|
else
|
||
|
|
suffix = "AAP";
|
||
|
|
break;
|
||
|
|
case 0x96: /* CN70XX */
|
||
|
|
family = "70";
|
||
|
|
if (cvmx_read_csr(CVMX_MIO_FUS_PDF) & (0x1ULL << 32))
|
||
|
|
family = "71";
|
||
|
|
if (fus_dat2.cn70xx.nocrypto)
|
||
|
|
suffix = "CP";
|
||
|
|
else if (fus_dat3.cn70xx.nodfa_dte)
|
||
|
|
suffix = "SCP";
|
||
|
|
else
|
||
|
|
suffix = "AAP";
|
||
|
|
break;
|
||
|
|
case 0x97: /* CN73XX */
|
||
|
|
if (num_cores == 6) /* Other core counts match generic */
|
||
|
|
core_model = "35";
|
||
|
|
family = "73";
|
||
|
|
if (fus_dat3.cn73xx.l2c_crip == 2)
|
||
|
|
family = "72";
|
||
|
|
if (fus_dat3.cn73xx.nozip
|
||
|
|
&& fus_dat3.cn73xx.nodfa_dte
|
||
|
|
&& fus_dat3.cn73xx.nohna_dte) {
|
||
|
|
if (!fus_dat2.cn73xx.raid_en)
|
||
|
|
suffix = "CP";
|
||
|
|
else
|
||
|
|
suffix = "SCP";
|
||
|
|
} else
|
||
|
|
suffix = "AAP";
|
||
|
|
break;
|
||
|
|
case 0x98: /* CN75XX */
|
||
|
|
family = "F75";
|
||
|
|
if (fus_dat3.cn78xx.nozip
|
||
|
|
&& fus_dat3.cn78xx.nodfa_dte
|
||
|
|
&& fus_dat3.cn78xx.nohna_dte)
|
||
|
|
suffix = "SCP";
|
||
|
|
else
|
||
|
|
suffix = "AAP";
|
||
|
|
break;
|
||
|
|
default:
|
||
|
|
family = "XX";
|
||
|
|
core_model = "XX";
|
||
|
|
strcpy(pass, "X.X");
|
||
|
|
suffix = "XXX";
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
|
||
|
|
clock_mhz = octeon_get_clock_rate() / 1000000;
|
||
|
|
if (family[0] != '3') {
|
||
|
|
int fuse_base = 384 / 8;
|
||
|
|
if (family[0] == '6')
|
||
|
|
fuse_base = 832 / 8;
|
||
|
|
|
||
|
|
/* Check for model in fuses, overrides normal decode */
|
||
|
|
/* This is _not_ valid for Octeon CN3XXX models */
|
||
|
|
fuse_data |= cvmx_fuse_read_byte(fuse_base + 3);
|
||
|
|
fuse_data = fuse_data << 8;
|
||
|
|
fuse_data |= cvmx_fuse_read_byte(fuse_base + 2);
|
||
|
|
fuse_data = fuse_data << 8;
|
||
|
|
fuse_data |= cvmx_fuse_read_byte(fuse_base + 1);
|
||
|
|
fuse_data = fuse_data << 8;
|
||
|
|
fuse_data |= cvmx_fuse_read_byte(fuse_base);
|
||
|
|
if (fuse_data & 0x7ffff) {
|
||
|
|
int model = fuse_data & 0x3fff;
|
||
|
|
int suffix = (fuse_data >> 14) & 0x1f;
|
||
|
|
if (suffix && model) {
|
||
|
|
/* Have both number and suffix in fuses, so both */
|
||
|
|
sprintf(fuse_model, "%d%c", model, 'A' + suffix - 1);
|
||
|
|
core_model = "";
|
||
|
|
family = fuse_model;
|
||
|
|
} else if (suffix && !model) {
|
||
|
|
/* Only have suffix, so add suffix to 'normal' model number */
|
||
|
|
sprintf(fuse_model, "%s%c", core_model, 'A' + suffix - 1);
|
||
|
|
core_model = fuse_model;
|
||
|
|
} else {
|
||
|
|
/* Don't have suffix, so just use model from fuses */
|
||
|
|
sprintf(fuse_model, "%d", model);
|
||
|
|
core_model = "";
|
||
|
|
family = fuse_model;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
sprintf(buffer, "CN%s%sp%s-%d-%s", family, core_model, pass, clock_mhz, suffix);
|
||
|
|
return buffer;
|
||
|
|
}
|
||
|
|
|
||
|
|
/**
|
||
|
|
* Given the chip processor ID from COP0, this function returns a
|
||
|
|
* string representing the chip model number. The string is of the
|
||
|
|
* form CNXXXXpX.X-FREQ-SUFFIX.
|
||
|
|
* - XXXX = The chip model number
|
||
|
|
* - X.X = Chip pass number
|
||
|
|
* - FREQ = Current frequency in Mhz
|
||
|
|
* - SUFFIX = NSP, EXP, SCP, SSP, or CP
|
||
|
|
*
|
||
|
|
* @chip_id: Chip ID
|
||
|
|
*
|
||
|
|
* Returns Model string
|
||
|
|
*/
|
||
|
|
const char *__init octeon_model_get_string(uint32_t chip_id)
|
||
|
|
{
|
||
|
|
static char buffer[32];
|
||
|
|
return octeon_model_get_string_buffer(chip_id, buffer);
|
||
|
|
}
|