213 lines
4.9 KiB
Plaintext
213 lines
4.9 KiB
Plaintext
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// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright 2013 Linaro Ltd.
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*/
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#include "ste-dbx5x0-pinctrl.dtsi"
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/ {
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soc {
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pinctrl {
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/* Settings for all SPI default and sleep states */
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spi2 {
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spi2_default_mode: spi_default {
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default_mux {
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function = "spi2";
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groups = "spi2_oc1_2";
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};
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default_cfg1 {
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pins = "GPIO216_AG12"; /* FRM */
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ste,config = <&gpio_out_hi>;
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};
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default_cfg2 {
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pins = "GPIO218_AH11"; /* RXD */
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ste,config = <&in_pd>;
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};
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default_cfg3 {
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pins =
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"GPIO215_AH13", /* TXD */
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"GPIO217_AH12"; /* CLK */
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ste,config = <&out_lo>;
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};
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};
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spi2_idle_mode: spi_idle {
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/*
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* The idle mode is basically sleep mode sans wakeups. Also
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* note that we have muxes the pins off the function here
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* as we do not state any muxing.
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*/
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idle_cfg1 {
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pins = "GPIO218_AH11"; /* RXD */
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ste,config = <&slpm_in_pdis>;
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};
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idle_cfg2 {
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pins = "GPIO215_AH13"; /* TXD */
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ste,config = <&slpm_out_lo_pdis>;
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};
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idle_cfg3 {
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pins = "GPIO217_AH12"; /* CLK */
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ste,config = <&slpm_pdis>;
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};
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};
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spi2_sleep_mode: spi_sleep {
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sleep_cfg1 {
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pins =
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"GPIO216_AG12", /* FRM */
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"GPIO218_AH11"; /* RXD */
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ste,config = <&slpm_in_wkup_pdis>;
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};
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sleep_cfg2 {
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pins = "GPIO215_AH13"; /* TXD */
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ste,config = <&slpm_out_lo_wkup_pdis>;
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};
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sleep_cfg3 {
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pins = "GPIO217_AH12"; /* CLK */
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ste,config = <&slpm_wkup_pdis>;
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};
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};
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};
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mcde {
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lcd_default_mode: lcd_default {
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default_mux1 {
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/* Mux in VSI0 and all the data lines */
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function = "lcd";
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groups =
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"lcdvsi0_a_1", /* VSI0 for LCD */
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"lcd_d0_d7_a_1", /* Data lines */
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"lcdvsi1_a_1"; /* VSI1 for HDMI */
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};
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default_mux2 {
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function = "lcda";
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groups =
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"lcdaclk_b_1"; /* Clock line for TV-out */
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};
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default_cfg1 {
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pins =
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"GPIO68_E1", /* VSI0 */
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"GPIO69_E2"; /* VSI1 */
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ste,config = <&in_pu>;
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};
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};
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lcd_sleep_mode: lcd_sleep {
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sleep_cfg1 {
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pins = "GPIO69_E2"; /* VSI1 */
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ste,config = <&slpm_in_wkup_pdis>;
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};
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};
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};
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ske {
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/* SKE keys on position 2 in an 8x8 matrix */
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ske_kpa2_default_mode: ske_kpa2_default {
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default_mux {
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function = "kp";
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groups = "kp_a_2";
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};
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default_cfg1 {
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pins =
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"GPIO153_B17", /* I7 */
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"GPIO154_C16", /* I6 */
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"GPIO155_C19", /* I5 */
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"GPIO156_C17", /* I4 */
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"GPIO161_D21", /* I3 */
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"GPIO162_D20", /* I2 */
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"GPIO163_C20", /* I1 */
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"GPIO164_B21"; /* I0 */
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ste,config = <&in_pd>;
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};
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default_cfg2 {
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pins =
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"GPIO157_A18", /* O7 */
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"GPIO158_C18", /* O6 */
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"GPIO159_B19", /* O5 */
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"GPIO160_B20", /* O4 */
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"GPIO165_C21", /* O3 */
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"GPIO166_A22", /* O2 */
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"GPIO167_B24", /* O1 */
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"GPIO168_C22"; /* O0 */
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ste,config = <&out_lo>;
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};
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};
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ske_kpa2_sleep_mode: ske_kpa2_sleep {
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sleep_cfg1 {
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pins =
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"GPIO153_B17", /* I7 */
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"GPIO154_C16", /* I6 */
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"GPIO155_C19", /* I5 */
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"GPIO156_C17", /* I4 */
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"GPIO161_D21", /* I3 */
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"GPIO162_D20", /* I2 */
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"GPIO163_C20", /* I1 */
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"GPIO164_B21"; /* I0 */
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ste,config = <&slpm_in_pu_wkup_pdis_en>;
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};
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sleep_cfg2 {
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pins =
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"GPIO157_A18", /* O7 */
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"GPIO158_C18", /* O6 */
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"GPIO159_B19", /* O5 */
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"GPIO160_B20", /* O4 */
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"GPIO165_C21", /* O3 */
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"GPIO166_A22", /* O2 */
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"GPIO167_B24", /* O1 */
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"GPIO168_C22"; /* O0 */
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ste,config = <&slpm_out_lo_pdis>;
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};
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};
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/*
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* SKE keys on position 1 and "other C1" combi giving
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* six rows of six keys.
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*/
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ske_kpaoc1_default_mode: ske_kpaoc1_default {
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default_mux {
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function = "kp";
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groups = "kp_a_1", "kp_oc1_1";
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};
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default_cfg1 {
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pins =
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"GPIO91_B6", /* KP_O0 */
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"GPIO90_A3", /* KP_O1 */
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"GPIO87_B3", /* KP_O2 */
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"GPIO86_C6", /* KP_O3 */
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"GPIO96_D8", /* KP_O6 */
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"GPIO94_D7"; /* KP_O7 */
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ste,config = <&out_lo>;
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};
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default_cfg2 {
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pins =
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"GPIO93_B7", /* KP_I0 */
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"GPIO92_D6", /* KP_I1 */
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"GPIO89_E6", /* KP_I2 */
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"GPIO88_C4", /* KP_I3 */
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"GPIO97_D9", /* KP_I6 */
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"GPIO95_E8"; /* KP_I7 */
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ste,config = <&in_pu>;
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};
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};
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};
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wlan {
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wlan_default_mode: wlan_default {
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/*
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* Activate this mode with the WLAN chip.
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* These are plain GPIO pins used by WLAN
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*/
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default_cfg1 {
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pins =
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"GPIO226_AF8", /* WLAN_PMU_EN */
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"GPIO85_D5"; /* WLAN_ENA */
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ste,config = <&gpio_out_lo>;
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};
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default_cfg2 {
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pins = "GPIO4_AH6"; /* WLAN_IRQ on UART1 */
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ste,config = <&gpio_in_pu>;
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};
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};
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};
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};
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};
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};
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