72 lines
2.2 KiB
Plaintext
72 lines
2.2 KiB
Plaintext
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// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
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/*
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* Copyright 2018-2022 TQ-Systems GmbH
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* Author: Markus Niebel <Markus.Niebel@tq-group.com>
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*/
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#include "imx6ul.dtsi"
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#include "imx6ul-tqma6ul-common.dtsi"
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#include "imx6ul-tqma6ulxl-common.dtsi"
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/ {
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model = "TQ-Systems TQMa6UL2L SoM";
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compatible = "tq,imx6ul-tqma6ul2l", "fsl,imx6ul";
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};
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&usdhc2 {
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fsl,tuning-step = <6>;
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};
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&iomuxc {
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pinctrl_usdhc2: usdhc2grp {
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fsl,pins = <
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MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x00017051
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MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x00017051
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MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x00017051
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MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x00017051
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MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x00017051
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MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x00017051
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MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x00017051
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MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x00017051
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MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x00017051
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MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x00017051
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/* rst */
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MX6UL_PAD_NAND_ALE__GPIO4_IO10 0x0001b051
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>;
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};
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pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
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fsl,pins = <
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MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x000170e1
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MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x000170f1
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MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x000170f1
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MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x000170f1
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MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x000170f1
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MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x000170f1
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MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x000170f1
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MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x000170f1
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MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x000170f1
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MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x000170f1
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/* rst */
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MX6UL_PAD_NAND_ALE__GPIO4_IO10 0x0001b051
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>;
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};
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pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
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fsl,pins = <
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MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x000170f9
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MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x000170f1
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MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x000170f1
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MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x000170f1
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MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x000170f1
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MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x000170f1
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MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x000170f1
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MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x000170f1
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MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x000170f1
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MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x000170f1
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/* rst */
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MX6UL_PAD_NAND_ALE__GPIO4_IO10 0x0001b051
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>;
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};
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};
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