41 lines
813 B
YAML
41 lines
813 B
YAML
|
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||
|
|
||
|
%YAML 1.2
|
||
|
---
|
||
|
$id: http://devicetree.org/schemas/serial/litex,liteuart.yaml#
|
||
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||
|
|
||
|
title: LiteUART serial controller
|
||
|
|
||
|
maintainers:
|
||
|
- Karol Gugala <kgugala@antmicro.com>
|
||
|
- Mateusz Holenko <mholenko@antmicro.com>
|
||
|
|
||
|
description: |
|
||
|
LiteUART serial controller is a part of the LiteX FPGA SoC builder. It supports
|
||
|
multiple CPU architectures, currently including e.g. OpenRISC and RISC-V.
|
||
|
|
||
|
properties:
|
||
|
compatible:
|
||
|
const: litex,liteuart
|
||
|
|
||
|
reg:
|
||
|
maxItems: 1
|
||
|
|
||
|
interrupts:
|
||
|
maxItems: 1
|
||
|
|
||
|
required:
|
||
|
- compatible
|
||
|
- reg
|
||
|
|
||
|
additionalProperties: false
|
||
|
|
||
|
examples:
|
||
|
- |
|
||
|
uart0: serial@e0001800 {
|
||
|
compatible = "litex,liteuart";
|
||
|
reg = <0xe0001800 0x100>;
|
||
|
interrupts = <2>;
|
||
|
};
|