forked from BSB-WS23/mpstubs
81 lines
2.6 KiB
C
81 lines
2.6 KiB
C
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/*! \file
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* \brief Gather system information from the \ref ACPI about the \ref APIC "Advanced Programmable Interrupt Controller (APIC)"
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*/
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#pragma once
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#include "types.h"
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/*! \brief Information about the (extended) Advanced Programmable Interrupt Controller
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*/
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namespace APIC {
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/*! \brief Historic order of interrupt lines (PIC)
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*/
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enum Device {
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TIMER = 0, ///< Programmable Interrupt Timer (\ref PIT)
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KEYBOARD = 1, ///< Keyboard
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COM1 = 4, ///< First serial interface
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COM2 = 3, ///< Second serial interface
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COM3 = 4, ///< Third serial interface (shared with COM1)
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COM4 = 3, ///< Forth serial interface (shared with COM2)
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FLOPPY = 6, ///< Floppy device
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LPT1 = 7, ///< Printer
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REALTIMECLOCK = 8, ///< Real time clock
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PS2MOUSE = 12, ///< Mouse
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IDE1 = 14, ///< First hard disk
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IDE2 = 15 ///< Second hard disk
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};
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/*! \brief Invalid APIC ID
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*
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* The highest address is reserved according to xAPIC specification
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*/
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const uint8_t INVALID_ID = 0xff;
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/*! \brief Executes system detection
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*
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* Searches and evaluates the APIC entries in the \ref ACPI table.
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* This function recognizes a possibly existing multicore system.
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* After successful detection, the number of available CPUs (which is equal
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* to the number of \ref LAPIC "local APICs") ) can be queried
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* using the method \ref Core::count().
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*
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* \note Called by \ref kernel_init() on BSP
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*
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* \return `true` if detection of the APIC entries was successful
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*/
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bool init();
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/*! \brief Queries the physical I/O-APIC address determined during system boot
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*
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* \return Base address of the (first & only supported) I/O APIC
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*/
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uintptr_t getIOAPICAddress();
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/*! \brief Queries of ID of the I/O-APIC determined during system boot
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*
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* \return Identification of the (first & only supported) I/O APIC
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*/
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uint8_t getIOAPICID();
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/*! \brief Returns the pin number the \p device is connected to.
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*/
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uint8_t getIOAPICSlot(APIC::Device device);
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/*! \brief Returns the logical ID of the Local APIC passed for \a core.
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*
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* The LAPIC's logical ID is set (by StuBS) during boot such that exactly one bit is set per CPU core.
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* For core 0, bit 0 is set in its ID, while core 1 has bit 1 set, etc.
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*
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* \param core The queried CPU core
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*/
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uint8_t getLogicalAPICID(uint8_t core);
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/*! \brief Get the Local APIC ID of a CPU
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* \param core Query CPU core number
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* \return LAPIC ID of CPU or INVALID_ID if invalid CPU ID
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*/
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uint8_t getLAPICID(uint8_t core);
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} // namespace APIC
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