108 lines
3.2 KiB
LLVM
108 lines
3.2 KiB
LLVM
; RUN: opt -mtriple=amdgcn-amd-amdhsa -S -inline < %s | FileCheck %s
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; RUN: opt -mtriple=amdgcn-amd-amdhsa -S -passes='cgscc(inline)' < %s | FileCheck %s
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define i32 @func_default() #0 {
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ret i32 0
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}
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define i32 @func_dx10_clamp_enabled() #1 {
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ret i32 0
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}
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define i32 @func_dx10_clamp_disabled() #2 {
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ret i32 0
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}
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; CHECK-LABEL: @default_call_default(
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; CHECK-NEXT: ret i32 0
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define i32 @default_call_default() #0 {
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%call = call i32 @func_default()
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ret i32 %call
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}
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; CHECK-LABEL: @dx10_clamp_enabled_call_default(
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; CHECK-NEXT: ret i32 0
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define i32 @dx10_clamp_enabled_call_default() #1 {
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%call = call i32 @func_default()
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ret i32 %call
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}
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; CHECK-LABEL: @dx10_clamp_enabled_call_dx10_clamp_enabled(
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; CHECK-NEXT: ret i32 0
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define i32 @dx10_clamp_enabled_call_dx10_clamp_enabled() #1 {
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%call = call i32 @func_dx10_clamp_enabled()
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ret i32 %call
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}
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; CHECK-LABEL: @dx10_clamp_enabled_call_dx10_clamp_disabled(
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; CHECK-NEXT: call i32 @func_dx10_clamp_disabled()
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define i32 @dx10_clamp_enabled_call_dx10_clamp_disabled() #1 {
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%call = call i32 @func_dx10_clamp_disabled()
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ret i32 %call
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}
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; CHECK-LABEL: @dx10_clamp_disabled_call_default(
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; CHECK-NEXT: call i32 @func_default()
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define i32 @dx10_clamp_disabled_call_default() #2 {
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%call = call i32 @func_default()
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ret i32 %call
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}
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; CHECK-LABEL: @dx10_clamp_disabled_call_dx10_clamp_enabled(
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; CHECK-NEXT: call i32 @func_dx10_clamp_enabled()
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define i32 @dx10_clamp_disabled_call_dx10_clamp_enabled() #2 {
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%call = call i32 @func_dx10_clamp_enabled()
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ret i32 %call
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}
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; CHECK-LABEL: @dx10_clamp_disabled_call_dx10_clamp_disabled(
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; CHECK-NEXT: ret i32 0
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define i32 @dx10_clamp_disabled_call_dx10_clamp_disabled() #2 {
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%call = call i32 @func_dx10_clamp_disabled()
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ret i32 %call
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}
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; Shader calling a compute function
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; CHECK-LABEL: @amdgpu_ps_default_call_default(
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; CHECK-NEXT: call i32 @func_default()
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define amdgpu_ps i32 @amdgpu_ps_default_call_default() #0 {
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%call = call i32 @func_default()
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ret i32 %call
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}
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; Shader with dx10_clamp enabled calling a compute function. Default
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; also implies ieee_mode, so this isn't inlinable.
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; CHECK-LABEL: @amdgpu_ps_dx10_clamp_enabled_call_default(
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; CHECK-NEXT: call i32 @func_default()
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define amdgpu_ps i32 @amdgpu_ps_dx10_clamp_enabled_call_default() #1 {
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%call = call i32 @func_default()
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ret i32 %call
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}
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; CHECK-LABEL: @amdgpu_ps_dx10_clamp_disabled_call_default(
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; CHECK-NEXT: call i32 @func_default()
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define amdgpu_ps i32 @amdgpu_ps_dx10_clamp_disabled_call_default() #2 {
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%call = call i32 @func_default()
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ret i32 %call
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}
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; CHECK-LABEL: @amdgpu_ps_dx10_clamp_enabled_ieee_call_default(
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; CHECK-NEXT: ret i32 0
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define amdgpu_ps i32 @amdgpu_ps_dx10_clamp_enabled_ieee_call_default() #3 {
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%call = call i32 @func_default()
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ret i32 %call
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}
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; CHECK-LABEL: @amdgpu_ps_dx10_clamp_disabled_ieee_call_default(
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; CHECK-NEXT: call i32 @func_default()
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define amdgpu_ps i32 @amdgpu_ps_dx10_clamp_disabled_ieee_call_default() #4 {
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%call = call i32 @func_default()
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ret i32 %call
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}
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attributes #0 = { nounwind }
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attributes #1 = { nounwind "amdgpu-dx10-clamp"="true" }
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attributes #2 = { nounwind "amdgpu-dx10-clamp"="false" }
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attributes #3 = { nounwind "amdgpu-dx10-clamp"="true" "amdgpu-ieee"="true" }
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attributes #4 = { nounwind "amdgpu-dx10-clamp"="false" "amdgpu-ieee"="true" }
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