820 lines
21 KiB
LLVM
820 lines
21 KiB
LLVM
; RUN: opt < %s -data-layout="e-p:32:32:32-p1:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-n8:16:32" -basic-aa -gvn -S -dce | FileCheck %s
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; RUN: opt < %s -data-layout="E-p:32:32:32-p1:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-n32" -basic-aa -gvn -S -dce | FileCheck %s
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;; Trivial RLE test.
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define i32 @test0(i32 %V, i32* %P) {
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store i32 %V, i32* %P
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%A = load i32, i32* %P
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ret i32 %A
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; CHECK-LABEL: @test0(
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; CHECK: ret i32 %V
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}
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;;===----------------------------------------------------------------------===;;
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;; Tests for crashers
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;;===----------------------------------------------------------------------===;;
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;; PR5016
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define i8 @crash0({i32, i32} %A, {i32, i32}* %P) {
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store {i32, i32} %A, {i32, i32}* %P
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%X = bitcast {i32, i32}* %P to i8*
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%Y = load i8, i8* %X
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ret i8 %Y
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}
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;; No PR filed, crashed in CaptureTracker.
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declare void @helper()
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define void @crash1() {
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tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* undef, i8* undef, i64 undef, i1 false) nounwind
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%tmp = load i8, i8* bitcast (void ()* @helper to i8*)
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%x = icmp eq i8 %tmp, 15
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ret void
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}
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;;===----------------------------------------------------------------------===;;
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;; Store -> Load and Load -> Load forwarding where src and dst are different
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;; types, but where the base pointer is a must alias.
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;;===----------------------------------------------------------------------===;;
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;; i32 -> f32 forwarding.
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define float @coerce_mustalias1(i32 %V, i32* %P) {
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store i32 %V, i32* %P
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%P2 = bitcast i32* %P to float*
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%A = load float, float* %P2
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ret float %A
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; CHECK-LABEL: @coerce_mustalias1(
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; CHECK-NOT: load
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; CHECK: ret float
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}
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;; i32* -> float forwarding.
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define float @coerce_mustalias2(i32* %V, i32** %P) {
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store i32* %V, i32** %P
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%P2 = bitcast i32** %P to float*
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%A = load float, float* %P2
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ret float %A
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; CHECK-LABEL: @coerce_mustalias2(
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; CHECK-NOT: load
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; CHECK: ret float
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}
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;; float -> i32* forwarding.
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define i32* @coerce_mustalias3(float %V, float* %P) {
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store float %V, float* %P
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%P2 = bitcast float* %P to i32**
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%A = load i32*, i32** %P2
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ret i32* %A
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; CHECK-LABEL: @coerce_mustalias3(
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; CHECK-NOT: load
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; CHECK: ret i32*
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}
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;; i32 -> f32 load forwarding.
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define float @coerce_mustalias4(i32* %P, i1 %cond) {
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%A = load i32, i32* %P
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%P2 = bitcast i32* %P to float*
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%B = load float, float* %P2
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br i1 %cond, label %T, label %F
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T:
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ret float %B
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F:
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%X = bitcast i32 %A to float
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ret float %X
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; CHECK-LABEL: @coerce_mustalias4(
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; CHECK: %A = load i32, i32* %P
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; CHECK-NOT: load
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; CHECK: ret float
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; CHECK: F:
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}
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;; i32 -> i8 forwarding
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define i8 @coerce_mustalias5(i32 %V, i32* %P) {
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store i32 %V, i32* %P
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%P2 = bitcast i32* %P to i8*
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%A = load i8, i8* %P2
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ret i8 %A
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; CHECK-LABEL: @coerce_mustalias5(
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; CHECK-NOT: load
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; CHECK: ret i8
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}
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;; i64 -> float forwarding
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define float @coerce_mustalias6(i64 %V, i64* %P) {
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store i64 %V, i64* %P
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%P2 = bitcast i64* %P to float*
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%A = load float, float* %P2
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ret float %A
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; CHECK-LABEL: @coerce_mustalias6(
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; CHECK-NOT: load
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; CHECK: ret float
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}
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;; i64 -> i8* (32-bit) forwarding
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define i8* @coerce_mustalias7(i64 %V, i64* %P) {
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store i64 %V, i64* %P
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%P2 = bitcast i64* %P to i8**
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%A = load i8*, i8** %P2
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ret i8* %A
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; CHECK-LABEL: @coerce_mustalias7(
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; CHECK-NOT: load
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; CHECK: ret i8*
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}
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; memset -> i16 forwarding.
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define signext i16 @memset_to_i16_local(i16* %A) nounwind ssp {
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entry:
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%conv = bitcast i16* %A to i8*
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tail call void @llvm.memset.p0i8.i64(i8* %conv, i8 1, i64 200, i1 false)
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%arrayidx = getelementptr inbounds i16, i16* %A, i64 42
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%tmp2 = load i16, i16* %arrayidx
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ret i16 %tmp2
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; CHECK-LABEL: @memset_to_i16_local(
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; CHECK-NOT: load
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; CHECK: ret i16 257
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}
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; memset -> float forwarding.
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define float @memset_to_float_local(float* %A, i8 %Val) nounwind ssp {
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entry:
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%conv = bitcast float* %A to i8* ; <i8*> [#uses=1]
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tail call void @llvm.memset.p0i8.i64(i8* %conv, i8 %Val, i64 400, i1 false)
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%arrayidx = getelementptr inbounds float, float* %A, i64 42 ; <float*> [#uses=1]
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%tmp2 = load float, float* %arrayidx ; <float> [#uses=1]
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ret float %tmp2
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; CHECK-LABEL: @memset_to_float_local(
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; CHECK-NOT: load
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; CHECK: zext
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; CHECK-NEXT: shl
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; CHECK-NEXT: or
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; CHECK-NEXT: shl
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; CHECK-NEXT: or
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; CHECK-NEXT: bitcast
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; CHECK-NEXT: ret float
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}
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;; non-local memset -> i16 load forwarding.
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define i16 @memset_to_i16_nonlocal0(i16* %P, i1 %cond) {
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%P3 = bitcast i16* %P to i8*
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br i1 %cond, label %T, label %F
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T:
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tail call void @llvm.memset.p0i8.i64(i8* %P3, i8 1, i64 400, i1 false)
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br label %Cont
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F:
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tail call void @llvm.memset.p0i8.i64(i8* %P3, i8 2, i64 400, i1 false)
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br label %Cont
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Cont:
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%P2 = getelementptr i16, i16* %P, i32 4
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%A = load i16, i16* %P2
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ret i16 %A
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; CHECK-LABEL: @memset_to_i16_nonlocal0(
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; CHECK: Cont:
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; CHECK-NEXT: %A = phi i16 [ 514, %F ], [ 257, %T ]
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; CHECK-NOT: load
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; CHECK: ret i16 %A
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}
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@GCst = constant {i32, float, i32 } { i32 42, float 14., i32 97 }
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@GCst_as1 = addrspace(1) constant {i32, float, i32 } { i32 42, float 14., i32 97 }
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; memset -> float forwarding.
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define float @memcpy_to_float_local(float* %A) nounwind ssp {
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entry:
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%conv = bitcast float* %A to i8* ; <i8*> [#uses=1]
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tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %conv, i8* bitcast ({i32, float, i32 }* @GCst to i8*), i64 12, i1 false)
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%arrayidx = getelementptr inbounds float, float* %A, i64 1 ; <float*> [#uses=1]
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%tmp2 = load float, float* %arrayidx ; <float> [#uses=1]
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ret float %tmp2
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; CHECK-LABEL: @memcpy_to_float_local(
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; CHECK-NOT: load
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; CHECK: ret float 1.400000e+01
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}
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; memcpy from address space 1
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define float @memcpy_to_float_local_as1(float* %A) nounwind ssp {
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entry:
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%conv = bitcast float* %A to i8* ; <i8*> [#uses=1]
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tail call void @llvm.memcpy.p0i8.p1i8.i64(i8* %conv, i8 addrspace(1)* bitcast ({i32, float, i32 } addrspace(1)* @GCst_as1 to i8 addrspace(1)*), i64 12, i1 false)
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%arrayidx = getelementptr inbounds float, float* %A, i64 1 ; <float*> [#uses=1]
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%tmp2 = load float, float* %arrayidx ; <float> [#uses=1]
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ret float %tmp2
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; CHECK-LABEL: @memcpy_to_float_local_as1(
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; CHECK-NOT: load
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; CHECK: ret float 1.400000e+01
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}
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;; non-local i32/float -> i8 load forwarding.
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define i8 @coerce_mustalias_nonlocal0(i32* %P, i1 %cond) {
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%P2 = bitcast i32* %P to float*
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%P3 = bitcast i32* %P to i8*
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br i1 %cond, label %T, label %F
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T:
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store i32 42, i32* %P
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br label %Cont
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F:
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store float 1.0, float* %P2
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br label %Cont
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Cont:
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%A = load i8, i8* %P3
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ret i8 %A
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; CHECK-LABEL: @coerce_mustalias_nonlocal0(
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; CHECK: Cont:
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; CHECK: %A = phi i8 [
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; CHECK-NOT: load
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; CHECK: ret i8 %A
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}
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;; non-local i32/float -> i8 load forwarding. This also tests that the "P3"
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;; bitcast equivalence can be properly phi translated.
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define i8 @coerce_mustalias_nonlocal1(i32* %P, i1 %cond) {
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%P2 = bitcast i32* %P to float*
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br i1 %cond, label %T, label %F
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T:
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store i32 42, i32* %P
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br label %Cont
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F:
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store float 1.0, float* %P2
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br label %Cont
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Cont:
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%P3 = bitcast i32* %P to i8*
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%A = load i8, i8* %P3
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ret i8 %A
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; CHECK-LABEL: @coerce_mustalias_nonlocal1(
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; CHECK: Cont:
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; CHECK: %A = phi i8 [
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; CHECK-NOT: load
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; CHECK: ret i8 %A
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}
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;; non-local i32 -> i8 partial redundancy load forwarding.
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define i8 @coerce_mustalias_pre0(i32* %P, i1 %cond) {
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%P3 = bitcast i32* %P to i8*
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br i1 %cond, label %T, label %F
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T:
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store i32 42, i32* %P
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br label %Cont
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F:
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br label %Cont
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Cont:
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%A = load i8, i8* %P3
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ret i8 %A
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; CHECK-LABEL: @coerce_mustalias_pre0(
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; CHECK: F:
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; CHECK: load i8, i8* %P3
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; CHECK: Cont:
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; CHECK: %A = phi i8 [
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; CHECK-NOT: load
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; CHECK: ret i8 %A
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}
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;;===----------------------------------------------------------------------===;;
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;; Store -> Load and Load -> Load forwarding where src and dst are different
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;; types, and the reload is an offset from the store pointer.
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;;===----------------------------------------------------------------------===;;
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;; i32 -> i8 forwarding.
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;; PR4216
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define i8 @coerce_offset0(i32 %V, i32* %P) {
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store i32 %V, i32* %P
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%P2 = bitcast i32* %P to i8*
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%P3 = getelementptr i8, i8* %P2, i32 2
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%A = load i8, i8* %P3
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ret i8 %A
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; CHECK-LABEL: @coerce_offset0(
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; CHECK-NOT: load
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; CHECK: ret i8
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}
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;; non-local i32/float -> i8 load forwarding.
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define i8 @coerce_offset_nonlocal0(i32* %P, i1 %cond) {
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%P2 = bitcast i32* %P to float*
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%P3 = bitcast i32* %P to i8*
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%P4 = getelementptr i8, i8* %P3, i32 2
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br i1 %cond, label %T, label %F
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T:
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store i32 57005, i32* %P
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br label %Cont
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F:
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store float 1.0, float* %P2
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br label %Cont
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Cont:
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%A = load i8, i8* %P4
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ret i8 %A
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; CHECK-LABEL: @coerce_offset_nonlocal0(
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; CHECK: Cont:
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; CHECK: %A = phi i8 [
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; CHECK-NOT: load
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; CHECK: ret i8 %A
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}
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;; non-local i32 -> i8 partial redundancy load forwarding.
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define i8 @coerce_offset_pre0(i32* %P, i1 %cond) {
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%P3 = bitcast i32* %P to i8*
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%P4 = getelementptr i8, i8* %P3, i32 2
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br i1 %cond, label %T, label %F
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T:
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store i32 42, i32* %P
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br label %Cont
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F:
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br label %Cont
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Cont:
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%A = load i8, i8* %P4
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ret i8 %A
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; CHECK-LABEL: @coerce_offset_pre0(
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; CHECK: F:
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; CHECK: load i8, i8* %P4
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; CHECK: Cont:
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; CHECK: %A = phi i8 [
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; CHECK-NOT: load
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; CHECK: ret i8 %A
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}
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define i32 @chained_load(i32** %p, i32 %x, i32 %y) {
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block1:
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%A = alloca i32*
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%z = load i32*, i32** %p
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store i32* %z, i32** %A
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%cmp = icmp eq i32 %x, %y
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br i1 %cmp, label %block2, label %block3
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block2:
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%a = load i32*, i32** %p
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br label %block4
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block3:
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%b = load i32*, i32** %p
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br label %block4
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block4:
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%c = load i32*, i32** %p
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%d = load i32, i32* %c
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ret i32 %d
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; CHECK-LABEL: @chained_load(
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; CHECK: %z = load i32*, i32** %p
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; CHECK-NOT: load
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; CHECK: %d = load i32, i32* %z
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; CHECK-NEXT: ret i32 %d
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}
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declare i1 @cond() readonly
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declare i1 @cond2() readonly
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define i32 @phi_trans2() {
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; CHECK-LABEL: @phi_trans2(
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entry:
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%P = alloca i32, i32 400
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br label %F1
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F1:
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%A = phi i32 [1, %entry], [2, %F]
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%cond2 = call i1 @cond()
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br i1 %cond2, label %T1, label %TY
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T1:
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%P2 = getelementptr i32, i32* %P, i32 %A
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%x = load i32, i32* %P2
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%cond = call i1 @cond2()
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br i1 %cond, label %TX, label %F
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F:
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%P3 = getelementptr i32, i32* %P, i32 2
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store i32 17, i32* %P3
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store i32 42, i32* %P2 ; Provides "P[A]".
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br label %F1
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TX:
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; This load should not be compiled to 'ret i32 42'. An overly clever
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; implementation of GVN would see that we're returning 17 if the loop
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; executes once or 42 if it executes more than that, but we'd have to do
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; loop restructuring to expose this, and GVN shouldn't do this sort of CFG
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; transformation.
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; CHECK: TX:
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; CHECK: ret i32 %x
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ret i32 %x
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TY:
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ret i32 0
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}
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define i32 @phi_trans3(i32* %p, i32 %x, i32 %y, i32 %z) {
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; CHECK-LABEL: @phi_trans3(
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block1:
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%cmpxy = icmp eq i32 %x, %y
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br i1 %cmpxy, label %block2, label %block3
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block2:
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store i32 87, i32* %p
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br label %block4
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block3:
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%p2 = getelementptr i32, i32* %p, i32 43
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store i32 97, i32* %p2
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br label %block4
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block4:
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%A = phi i32 [-1, %block2], [42, %block3]
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br i1 %cmpxy, label %block5, label %exit
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; CHECK: block4:
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; CHECK-NEXT: %D = phi i32 [ 87, %block2 ], [ 97, %block3 ]
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; CHECK-NOT: load
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block5:
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%B = add i32 %A, 1
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br i1 %cmpxy, label %block6, label %exit
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block6:
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%C = getelementptr i32, i32* %p, i32 %B
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br i1 %cmpxy, label %block7, label %exit
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block7:
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%D = load i32, i32* %C
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ret i32 %D
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; CHECK: block7:
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; CHECK-NEXT: ret i32 %D
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exit:
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ret i32 -1
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}
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define i8 @phi_trans4(i8* %p) {
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; CHECK-LABEL: @phi_trans4(
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entry:
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%X3 = getelementptr i8, i8* %p, i32 192
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store i8 192, i8* %X3
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|
|
%X = getelementptr i8, i8* %p, i32 4
|
|
%Y = load i8, i8* %X
|
|
br label %loop
|
|
|
|
loop:
|
|
%i = phi i32 [4, %entry], [192, %loop]
|
|
%X2 = getelementptr i8, i8* %p, i32 %i
|
|
%Y2 = load i8, i8* %X2
|
|
|
|
; CHECK: loop:
|
|
; CHECK-NEXT: %Y2 = phi i8 [ %Y, %entry ], [ 0, %loop ]
|
|
; CHECK-NOT: load i8
|
|
|
|
%cond = call i1 @cond2()
|
|
|
|
%Z = bitcast i8 *%X3 to i32*
|
|
store i32 0, i32* %Z
|
|
br i1 %cond, label %loop, label %out
|
|
|
|
out:
|
|
%R = add i8 %Y, %Y2
|
|
ret i8 %R
|
|
}
|
|
|
|
define i8 @phi_trans5(i8* %p) {
|
|
; CHECK-LABEL: @phi_trans5(
|
|
entry:
|
|
|
|
%X4 = getelementptr i8, i8* %p, i32 2
|
|
store i8 19, i8* %X4
|
|
|
|
%X = getelementptr i8, i8* %p, i32 4
|
|
%Y = load i8, i8* %X
|
|
br label %loop
|
|
|
|
loop:
|
|
%i = phi i32 [4, %entry], [3, %cont]
|
|
%X2 = getelementptr i8, i8* %p, i32 %i
|
|
%Y2 = load i8, i8* %X2 ; Ensure this load is not being incorrectly replaced.
|
|
%cond = call i1 @cond2()
|
|
br i1 %cond, label %cont, label %out
|
|
|
|
cont:
|
|
%Z = getelementptr i8, i8* %X2, i32 -1
|
|
%Z2 = bitcast i8 *%Z to i32*
|
|
store i32 50462976, i32* %Z2 ;; (1 << 8) | (2 << 16) | (3 << 24)
|
|
|
|
|
|
; CHECK: store i32
|
|
; CHECK-NEXT: getelementptr i8, i8* %p, i32 3
|
|
; CHECK-NEXT: load i8, i8*
|
|
br label %loop
|
|
|
|
out:
|
|
%R = add i8 %Y, %Y2
|
|
ret i8 %R
|
|
}
|
|
|
|
declare void @use_i32(i32) readonly
|
|
|
|
; indirectbr currently prevents MergeBlockIntoPredecessor from merging latch
|
|
; into header. Make sure we translate the address for %l1 correctly where
|
|
; parts of the address computations are in different basic blocks.
|
|
define i32 @phi_trans6(i32* noalias nocapture readonly %x, i1 %cond) {
|
|
; CHECK-LABEL: define i32 @phi_trans6(
|
|
; CHECK-LABEL: entry:
|
|
; CHECK-NEXT: %l0 = load i32, i32* %x
|
|
;
|
|
; CHECK-LABEL: header:
|
|
; CHECK-NEXT: %l1 = phi i32 [ %l0, %entry ], [ %l1.pre, %latch.header_crit_edge ]
|
|
; CHECK-NEXT: %iv = phi i32 [ 0, %entry ], [ %iv.next, %latch.header_crit_edge ]
|
|
; CHECK-NEXT: indirectbr i8* blockaddress(@phi_trans6, %latch), [label %latch]
|
|
;
|
|
; CHECK-LABEL: latch:
|
|
; CHECK-NEXT: %iv.next = add i32 %iv, 1
|
|
; CHECK-NEXT: br i1 %cond, label %exit, label %latch.header_crit_edge
|
|
;
|
|
; CHECK-LABEL: latch.header_crit_edge:
|
|
; CHECK-NEXT: %gep.1.phi.trans.insert.phi.trans.insert = getelementptr i32, i32* %x, i32 %iv.next
|
|
; CHECK-NEXT: %l1.pre = load i32, i32* %gep.1.phi.trans.insert.phi.trans.insert
|
|
; CHECK-LABEL: br label %header
|
|
;
|
|
entry:
|
|
%l0 = load i32, i32* %x
|
|
call void @use_i32(i32 %l0)
|
|
br label %header
|
|
|
|
header:
|
|
%iv = phi i32 [0, %entry], [ %iv.next, %latch]
|
|
indirectbr i8* blockaddress(@phi_trans6, %latch), [label %latch]
|
|
|
|
latch:
|
|
%gep.1 = getelementptr i32, i32* %x, i32 %iv
|
|
%l1 = load i32, i32* %gep.1
|
|
%iv.next = add i32 %iv, 1
|
|
br i1 %cond, label %exit, label %header
|
|
|
|
exit:
|
|
ret i32 %l1
|
|
}
|
|
|
|
; FIXME: Currently we fail to translate the PHI in this case.
|
|
define i32 @phi_trans7(i32* noalias nocapture readonly %x, i1 %cond) {
|
|
; CHECK-LABEL: define i32 @phi_trans7(
|
|
; CHECK-LABEL: entry:
|
|
; CHECK-NEXT: %l0 = load i32, i32* %x
|
|
;
|
|
; CHECK-LABEL: header:
|
|
; CHECK-NEXT: %iv = phi i32 [ 2, %entry ], [ %iv.next, %latch.header_crit_edge ]
|
|
; CHECK-NEXT: %offset = add i32 %iv, -2
|
|
; CHECK-NEXT: indirectbr i8* blockaddress(@phi_trans7, %latch), [label %latch]
|
|
;
|
|
; CHECK-LABEL: latch:
|
|
; CHECK-NEXT: %gep.1 = getelementptr i32, i32* %x, i32 %offset
|
|
; CHECK-NEXT: %l1 = load i32, i32* %gep.1
|
|
; CHECK-NEXT: %iv.next = add i32 %iv, 1
|
|
; CHECK-NEXT: br i1 %cond, label %exit, label %latch.header_crit_edge
|
|
;
|
|
; CHECK-LABEL: latch.header_crit_edge:
|
|
; CHECK-LABEL: br label %header
|
|
;
|
|
entry:
|
|
%l0 = load i32, i32* %x
|
|
call void @use_i32(i32 %l0)
|
|
br label %header
|
|
|
|
header:
|
|
%iv = phi i32 [2, %entry], [ %iv.next, %latch]
|
|
%offset = add i32 %iv, -2
|
|
indirectbr i8* blockaddress(@phi_trans7, %latch), [label %latch]
|
|
|
|
latch:
|
|
%gep.1 = getelementptr i32, i32* %x, i32 %offset
|
|
%l1 = load i32, i32* %gep.1
|
|
%iv.next = add i32 %iv, 1
|
|
br i1 %cond, label %exit, label %header
|
|
|
|
exit:
|
|
ret i32 %l1
|
|
}
|
|
|
|
; FIXME: Currently we fail to translate the PHI in this case.
|
|
define i32 @phi_trans8(i32* noalias nocapture readonly %x, i1 %cond) {
|
|
; CHECK-LABEL: define i32 @phi_trans8(
|
|
; CHECK-LABEL: entry:
|
|
; CHECK-NEXT: %l0 = load i32, i32* %x
|
|
;
|
|
; CHECK-LABEL: header:
|
|
; CHECK-NEXT: %iv = phi i32 [ 2, %entry ], [ %iv.next, %latch.header_crit_edge ]
|
|
; CHECK-NEXT: indirectbr i8* blockaddress(@phi_trans8, %latch), [label %latch]
|
|
;
|
|
; CHECK-LABEL: latch:
|
|
; CHECK-NEXT: %offset = add i32 %iv, -2
|
|
; CHECK-NEXT: %gep.1 = getelementptr i32, i32* %x, i32 %offset
|
|
; CHECK-NEXT: %l1 = load i32, i32* %gep.1
|
|
; CHECK-NEXT: %iv.next = add i32 %iv, 1
|
|
; CHECK-NEXT: br i1 %cond, label %exit, label %latch.header_crit_edge
|
|
;
|
|
; CHECK-LABEL: latch.header_crit_edge:
|
|
; CHECK-LABEL: br label %header
|
|
;
|
|
entry:
|
|
%l0 = load i32, i32* %x
|
|
call void @use_i32(i32 %l0)
|
|
br label %header
|
|
|
|
header:
|
|
%iv = phi i32 [2, %entry], [ %iv.next, %latch]
|
|
indirectbr i8* blockaddress(@phi_trans8, %latch), [label %latch]
|
|
|
|
latch:
|
|
%offset = add i32 %iv, -2
|
|
%gep.1 = getelementptr i32, i32* %x, i32 %offset
|
|
%l1 = load i32, i32* %gep.1
|
|
%iv.next = add i32 %iv, 1
|
|
br i1 %cond, label %exit, label %header
|
|
|
|
exit:
|
|
ret i32 %l1
|
|
}
|
|
|
|
|
|
|
|
; PR6642
|
|
define i32 @memset_to_load() nounwind readnone {
|
|
entry:
|
|
%x = alloca [256 x i32], align 4 ; <[256 x i32]*> [#uses=2]
|
|
%tmp = bitcast [256 x i32]* %x to i8* ; <i8*> [#uses=1]
|
|
call void @llvm.memset.p0i8.i64(i8* align 4 %tmp, i8 0, i64 1024, i1 false)
|
|
%arraydecay = getelementptr inbounds [256 x i32], [256 x i32]* %x, i32 0, i32 0 ; <i32*>
|
|
%tmp1 = load i32, i32* %arraydecay ; <i32> [#uses=1]
|
|
ret i32 %tmp1
|
|
; CHECK-LABEL: @memset_to_load(
|
|
; CHECK: ret i32 0
|
|
}
|
|
|
|
|
|
;;===----------------------------------------------------------------------===;;
|
|
;; Load -> Load forwarding in partial alias case.
|
|
;;===----------------------------------------------------------------------===;;
|
|
|
|
define i32 @load_load_partial_alias(i8* %P) nounwind ssp {
|
|
entry:
|
|
%0 = bitcast i8* %P to i32*
|
|
%tmp2 = load i32, i32* %0
|
|
%add.ptr = getelementptr inbounds i8, i8* %P, i64 1
|
|
%tmp5 = load i8, i8* %add.ptr
|
|
%conv = zext i8 %tmp5 to i32
|
|
%add = add nsw i32 %tmp2, %conv
|
|
ret i32 %add
|
|
|
|
; TEMPORARILYDISABLED-LABEL: @load_load_partial_alias(
|
|
; TEMPORARILYDISABLED: load i32, i32*
|
|
; TEMPORARILYDISABLED-NOT: load
|
|
; TEMPORARILYDISABLED: lshr i32 {{.*}}, 8
|
|
; TEMPORARILYDISABLED-NOT: load
|
|
; TEMPORARILYDISABLED: trunc i32 {{.*}} to i8
|
|
; TEMPORARILYDISABLED-NOT: load
|
|
; TEMPORARILYDISABLED: ret i32
|
|
}
|
|
|
|
|
|
; Cross block partial alias case.
|
|
define i32 @load_load_partial_alias_cross_block(i8* %P) nounwind ssp {
|
|
entry:
|
|
%xx = bitcast i8* %P to i32*
|
|
%x1 = load i32, i32* %xx, align 4
|
|
%cmp = icmp eq i32 %x1, 127
|
|
br i1 %cmp, label %land.lhs.true, label %if.end
|
|
|
|
land.lhs.true: ; preds = %entry
|
|
%arrayidx4 = getelementptr inbounds i8, i8* %P, i64 1
|
|
%tmp5 = load i8, i8* %arrayidx4, align 1
|
|
%conv6 = zext i8 %tmp5 to i32
|
|
ret i32 %conv6
|
|
|
|
if.end:
|
|
ret i32 52
|
|
; TEMPORARILY_DISABLED-LABEL: @load_load_partial_alias_cross_block(
|
|
; TEMPORARILY_DISABLED: land.lhs.true:
|
|
; TEMPORARILY_DISABLED-NOT: load i8
|
|
; TEMPORARILY_DISABLED: ret i32 %conv6
|
|
}
|
|
|
|
|
|
;;===----------------------------------------------------------------------===;;
|
|
;; Load Widening
|
|
;; We explicitly choose NOT to widen. And are testing to make sure we don't.
|
|
;;===----------------------------------------------------------------------===;;
|
|
|
|
%widening1 = type { i32, i8, i8, i8, i8 }
|
|
|
|
@f = global %widening1 zeroinitializer, align 4
|
|
|
|
define i32 @test_widening1(i8* %P) nounwind ssp noredzone {
|
|
entry:
|
|
%tmp = load i8, i8* getelementptr inbounds (%widening1, %widening1* @f, i64 0, i32 1), align 4
|
|
%conv = zext i8 %tmp to i32
|
|
%tmp1 = load i8, i8* getelementptr inbounds (%widening1, %widening1* @f, i64 0, i32 2), align 1
|
|
%conv2 = zext i8 %tmp1 to i32
|
|
%add = add nsw i32 %conv, %conv2
|
|
ret i32 %add
|
|
; CHECK-LABEL: @test_widening1(
|
|
; CHECK-NOT: load
|
|
; CHECK: load i8, i8*
|
|
; CHECK: load i8, i8*
|
|
; CHECK-NOT: load
|
|
; CHECK: ret i32
|
|
}
|
|
|
|
define i32 @test_widening2() nounwind ssp noredzone {
|
|
entry:
|
|
%tmp = load i8, i8* getelementptr inbounds (%widening1, %widening1* @f, i64 0, i32 1), align 4
|
|
%conv = zext i8 %tmp to i32
|
|
%tmp1 = load i8, i8* getelementptr inbounds (%widening1, %widening1* @f, i64 0, i32 2), align 1
|
|
%conv2 = zext i8 %tmp1 to i32
|
|
%add = add nsw i32 %conv, %conv2
|
|
|
|
%tmp2 = load i8, i8* getelementptr inbounds (%widening1, %widening1* @f, i64 0, i32 3), align 2
|
|
%conv3 = zext i8 %tmp2 to i32
|
|
%add2 = add nsw i32 %add, %conv3
|
|
|
|
%tmp3 = load i8, i8* getelementptr inbounds (%widening1, %widening1* @f, i64 0, i32 4), align 1
|
|
%conv4 = zext i8 %tmp3 to i32
|
|
%add3 = add nsw i32 %add2, %conv4
|
|
|
|
ret i32 %add3
|
|
; CHECK-LABEL: @test_widening2(
|
|
; CHECK-NOT: load
|
|
; CHECK: load i8, i8*
|
|
; CHECK: load i8, i8*
|
|
; CHECK: load i8, i8*
|
|
; CHECK: load i8, i8*
|
|
; CHECK-NOT: load
|
|
; CHECK: ret i32
|
|
}
|
|
|
|
|
|
declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i1) nounwind
|
|
|
|
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i1) nounwind
|
|
declare void @llvm.memcpy.p0i8.p1i8.i64(i8* nocapture, i8 addrspace(1)* nocapture, i64, i1) nounwind
|
|
|
|
|
|
;;===----------------------------------------------------------------------===;;
|
|
;; Load -> Store dependency which isn't interfered with by a call that happens
|
|
;; before the pointer was captured.
|
|
;;===----------------------------------------------------------------------===;;
|
|
|
|
%class.X = type { [8 x i8] }
|
|
|
|
@_ZTV1X = weak_odr constant [5 x i8*] zeroinitializer
|
|
@_ZTV1Y = weak_odr constant [5 x i8*] zeroinitializer
|
|
|
|
declare void @use()
|
|
declare void @use3(i8***, i8**)
|
|
|
|
; PR8908
|
|
define void @test_escape1() nounwind {
|
|
%x = alloca i8**, align 8
|
|
store i8** getelementptr inbounds ([5 x i8*], [5 x i8*]* @_ZTV1X, i64 0, i64 2), i8*** %x, align 8
|
|
call void @use() nounwind
|
|
%DEAD = load i8**, i8*** %x, align 8
|
|
call void @use3(i8*** %x, i8** %DEAD) nounwind
|
|
ret void
|
|
; CHECK: test_escape1
|
|
; CHECK-NOT: DEAD
|
|
; CHECK: ret
|
|
}
|