60 lines
2.9 KiB
ArmAsm
60 lines
2.9 KiB
ArmAsm
// RUN: llvm-mc -triple armv7a < %s -arm-add-build-attributes | FileCheck %s --check-prefix=v7A
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// RUN: llvm-mc -triple armv6m < %s -arm-add-build-attributes | FileCheck %s --check-prefix=v6M
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// RUN: llvm-mc -triple armv7m < %s -arm-add-build-attributes | FileCheck %s --check-prefix=v7M
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// RUN: llvm-mc -triple armv7a -mcpu=cortex-a15 < %s -arm-add-build-attributes | FileCheck %s --check-prefix=Cortex-A15
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// RUN: llvm-mc -triple armv8m.base < %s -arm-add-build-attributes | FileCheck %s --check-prefix=v8M_Baseline
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// RUN: llvm-mc -triple armv8m.main < %s -arm-add-build-attributes | FileCheck %s --check-prefix=v8M_Mainline
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// This isn't intended to be a through check of the build attributes emitted
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// for each target (that's tested elsewhere), but just to check that the
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// hardware attributes are emitted by the assembler based on the selected
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// target when requested.
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// v7A-NOT: .cpu
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// v7A: .eabi_attribute 6, 10 @ Tag_CPU_arch
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// v7A: .eabi_attribute 7, 65 @ Tag_CPU_arch_profile
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// v7A: .eabi_attribute 8, 1 @ Tag_ARM_ISA_use
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// v7A: .eabi_attribute 9, 2 @ Tag_THUMB_ISA_use
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// v7A: .fpu neon
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// v7A: .eabi_attribute 34, 1 @ Tag_CPU_unaligned_access
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// v6M-NOT: .cpu
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// v6M: .eabi_attribute 6, 12 @ Tag_CPU_arch
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// v6M: .eabi_attribute 7, 77 @ Tag_CPU_arch_profile
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// v6M: .eabi_attribute 8, 0 @ Tag_ARM_ISA_use
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// v6M: .eabi_attribute 9, 1 @ Tag_THUMB_ISA_use
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// v6M: .eabi_attribute 34, 0 @ Tag_CPU_unaligned_access
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// v7M-NOT: .cpu
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// v7M: .eabi_attribute 6, 10 @ Tag_CPU_arch
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// v7M: .eabi_attribute 7, 77 @ Tag_CPU_arch_profile
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// v7M: .eabi_attribute 8, 0 @ Tag_ARM_ISA_use
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// v7M: .eabi_attribute 9, 2 @ Tag_THUMB_ISA_use
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// v7M: .eabi_attribute 34, 1 @ Tag_CPU_unaligned_access
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// v8M_Baseline-NOT: .cpu
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// v8M_Baseline: .eabi_attribute 6, 16 @ Tag_CPU_arch
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// v8M_Baseline: .eabi_attribute 7, 77 @ Tag_CPU_arch_profile
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// v8M_Baseline: .eabi_attribute 8, 0 @ Tag_ARM_ISA_use
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// v8M_Baseline: .eabi_attribute 9, 3 @ Tag_THUMB_ISA_use
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// v8M_Baseline: .eabi_attribute 34, 0 @ Tag_CPU_unaligned_access
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// v8M_Mainline-NOT: .cpu
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// v8M_Mainline: .eabi_attribute 6, 17 @ Tag_CPU_arch
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// v8M_Mainline: .eabi_attribute 7, 77 @ Tag_CPU_arch_profile
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// v8M_Mainline: .eabi_attribute 8, 0 @ Tag_ARM_ISA_use
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// v8M_Mainline: .eabi_attribute 9, 3 @ Tag_THUMB_ISA_use
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// v8M_Mainline: .eabi_attribute 34, 1 @ Tag_CPU_unaligned_access
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// Cortex-A15: .cpu cortex-a15
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// Cortex-A15: .eabi_attribute 6, 10 @ Tag_CPU_arch
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// Cortex-A15: .eabi_attribute 7, 65 @ Tag_CPU_arch_profile
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// Cortex-A15: .eabi_attribute 8, 1 @ Tag_ARM_ISA_use
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// Cortex-A15: .eabi_attribute 9, 2 @ Tag_THUMB_ISA_use
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// Cortex-A15: .fpu neon-vfpv4
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// Cortex-A15: .eabi_attribute 36, 1 @ Tag_FP_HP_extension
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// Cortex-A15: .eabi_attribute 42, 1 @ Tag_MPextension_use
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// Cortex-A15: .eabi_attribute 44, 2 @ Tag_DIV_use
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// Cortex-A15: .eabi_attribute 34, 1 @ Tag_CPU_unaligned_access
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// Cortex-A15: .eabi_attribute 68, 3 @ Tag_Virtualization_use
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