108 lines
4.4 KiB
ArmAsm
108 lines
4.4 KiB
ArmAsm
// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
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// --------------------------------------------------------------------------//
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// Immediate out of lower bound [-16, 14].
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ld2b {z12.b, z13.b}, p4/z, [x12, #-18, MUL VL]
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 2 in range [-16, 14].
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// CHECK-NEXT: ld2b {z12.b, z13.b}, p4/z, [x12, #-18, MUL VL]
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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ld2b {z7.b, z8.b}, p3/z, [x1, #16, MUL VL]
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 2 in range [-16, 14].
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// CHECK-NEXT: ld2b {z7.b, z8.b}, p3/z, [x1, #16, MUL VL]
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Immediate not a multiple of two.
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ld2b {z12.b, z13.b}, p4/z, [x12, #-7, MUL VL]
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 2 in range [-16, 14].
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// CHECK-NEXT: ld2b {z12.b, z13.b}, p4/z, [x12, #-7, MUL VL]
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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ld2b {z7.b, z8.b}, p3/z, [x1, #5, MUL VL]
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 2 in range [-16, 14].
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// CHECK-NEXT: ld2b {z7.b, z8.b}, p3/z, [x1, #5, MUL VL]
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Invalid scalar + scalar addressing modes
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ld2b { z0.b, z1.b }, p0/z, [x0, xzr]
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 without shift
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// CHECK-NEXT: ld2b { z0.b, z1.b }, p0/z, [x0, xzr]
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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ld2b { z0.b, z1.b }, p0/z, [x0, x0, lsl #1]
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 without shift
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// CHECK-NEXT: ld2b { z0.b, z1.b }, p0/z, [x0, x0, lsl #1]
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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ld2b { z0.b, z1.b }, p0/z, [x0, w0]
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 without shift
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// CHECK-NEXT: ld2b { z0.b, z1.b }, p0/z, [x0, w0]
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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ld2b { z0.b, z1.b }, p0/z, [x0, w0, uxtw]
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 without shift
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// CHECK-NEXT: ld2b { z0.b, z1.b }, p0/z, [x0, w0, uxtw]
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// error: invalid restricted predicate register, expected p0..p7 (without element suffix)
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ld2b {z2.b, z3.b}, p8/z, [x15, #10, MUL VL]
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
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// CHECK-NEXT: ld2b {z2.b, z3.b}, p8/z, [x15, #10, MUL VL]
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Invalid vector list.
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ld2b { }, p0/z, [x0]
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector register expected
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// CHECK-NEXT: ld2b { }, p0/z, [x0]
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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ld2b { z0.b, z1.b, z2.b }, p0/z, [x0]
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
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// CHECK-NEXT: ld2b { z0.b, z1.b, z2.b }, p0/z, [x0]
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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ld2b { z0.b, z1.h }, p0/z, [x0]
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: mismatched register size suffix
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// CHECK-NEXT: ld2b { z0.b, z1.h }, p0/z, [x0]
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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ld2b { z0.b, z2.b }, p0/z, [x0]
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: registers must be sequential
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// CHECK-NEXT: ld2b { z0.b, z2.b }, p0/z, [x0]
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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ld2b { v0.2d, v1.2d }, p0/z, [x0]
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
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// CHECK-NEXT: ld2b { v0.2d, v1.2d }, p0/z, [x0]
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Negative tests for instructions that are incompatible with movprfx
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movprfx z21.b, p5/z, z28.b
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ld2b { z21.b, z22.b }, p5/z, [x10, #10, mul vl]
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
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// CHECK-NEXT: ld2b { z21.b, z22.b }, p5/z, [x10, #10, mul vl]
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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movprfx z21, z28
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ld2b { z21.b, z22.b }, p5/z, [x10, #10, mul vl]
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
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// CHECK-NEXT: ld2b { z21.b, z22.b }, p5/z, [x10, #10, mul vl]
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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