93 lines
3.5 KiB
ArmAsm
93 lines
3.5 KiB
ArmAsm
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
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// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
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// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
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// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
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// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
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// RUN: | llvm-objdump -d --mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
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// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
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// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
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ld1sw z0.d, p0/z, [x0]
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// CHECK-INST: ld1sw { z0.d }, p0/z, [x0]
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// CHECK-ENCODING: [0x00,0xa0,0x80,0xa4]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 a0 80 a4 <unknown>
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ld1sw { z0.d }, p0/z, [x0]
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// CHECK-INST: ld1sw { z0.d }, p0/z, [x0]
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// CHECK-ENCODING: [0x00,0xa0,0x80,0xa4]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 a0 80 a4 <unknown>
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ld1sw { z31.d }, p7/z, [sp, #-1, mul vl]
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// CHECK-INST: ld1sw { z31.d }, p7/z, [sp, #-1, mul vl]
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// CHECK-ENCODING: [0xff,0xbf,0x8f,0xa4]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: ff bf 8f a4 <unknown>
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ld1sw { z21.d }, p5/z, [x10, #5, mul vl]
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// CHECK-INST: ld1sw { z21.d }, p5/z, [x10, #5, mul vl]
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// CHECK-ENCODING: [0x55,0xb5,0x85,0xa4]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 55 b5 85 a4 <unknown>
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ld1sw { z23.d }, p3/z, [sp, x8, lsl #2]
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// CHECK-INST: ld1sw { z23.d }, p3/z, [sp, x8, lsl #2]
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// CHECK-ENCODING: [0xf7,0x4f,0x88,0xa4]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: f7 4f 88 a4 <unknown>
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ld1sw { z23.d }, p3/z, [x13, x8, lsl #2]
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// CHECK-INST: ld1sw { z23.d }, p3/z, [x13, x8, lsl #2]
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// CHECK-ENCODING: [0xb7,0x4d,0x88,0xa4]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: b7 4d 88 a4 <unknown>
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ld1sw { z31.d }, p7/z, [sp, z31.d]
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// CHECK-INST: ld1sw { z31.d }, p7/z, [sp, z31.d]
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// CHECK-ENCODING: [0xff,0x9f,0x5f,0xc5]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: ff 9f 5f c5 <unknown>
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ld1sw { z23.d }, p3/z, [x13, z8.d, lsl #2]
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// CHECK-INST: ld1sw { z23.d }, p3/z, [x13, z8.d, lsl #2]
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// CHECK-ENCODING: [0xb7,0x8d,0x68,0xc5]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: b7 8d 68 c5 <unknown>
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ld1sw { z21.d }, p5/z, [x10, z21.d, uxtw]
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// CHECK-INST: ld1sw { z21.d }, p5/z, [x10, z21.d, uxtw]
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// CHECK-ENCODING: [0x55,0x15,0x15,0xc5]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 55 15 15 c5 <unknown>
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ld1sw { z21.d }, p5/z, [x10, z21.d, sxtw]
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// CHECK-INST: ld1sw { z21.d }, p5/z, [x10, z21.d, sxtw]
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// CHECK-ENCODING: [0x55,0x15,0x55,0xc5]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 55 15 55 c5 <unknown>
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ld1sw { z0.d }, p0/z, [x0, z0.d, uxtw #2]
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// CHECK-INST: ld1sw { z0.d }, p0/z, [x0, z0.d, uxtw #2]
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// CHECK-ENCODING: [0x00,0x00,0x20,0xc5]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 00 20 c5 <unknown>
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ld1sw { z0.d }, p0/z, [x0, z0.d, sxtw #2]
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// CHECK-INST: ld1sw { z0.d }, p0/z, [x0, z0.d, sxtw #2]
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// CHECK-ENCODING: [0x00,0x00,0x60,0xc5]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 00 60 c5 <unknown>
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ld1sw { z31.d }, p7/z, [z31.d, #124]
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// CHECK-INST: ld1sw { z31.d }, p7/z, [z31.d, #124]
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// CHECK-ENCODING: [0xff,0x9f,0x3f,0xc5]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: ff 9f 3f c5 <unknown>
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ld1sw { z0.d }, p0/z, [z0.d]
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// CHECK-INST: ld1sw { z0.d }, p0/z, [z0.d]
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// CHECK-ENCODING: [0x00,0x80,0x20,0xc5]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 80 20 c5 <unknown>
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