llvm-for-llvmta/test/CodeGen/X86/extmul64.ll

26 lines
721 B
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i686-- | FileCheck %s
define i64 @i32_sext_i64(i32 %a, i32 %b) {
; CHECK-LABEL: i32_sext_i64:
; CHECK: # %bb.0:
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: imull {{[0-9]+}}(%esp)
; CHECK-NEXT: retl
%aa = sext i32 %a to i64
%bb = sext i32 %b to i64
%cc = mul i64 %aa, %bb
ret i64 %cc
}
define i64 @i32_zext_i64(i32 %a, i32 %b) {
; CHECK-LABEL: i32_zext_i64:
; CHECK: # %bb.0:
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: mull {{[0-9]+}}(%esp)
; CHECK-NEXT: retl
%aa = zext i32 %a to i64
%bb = zext i32 %b to i64
%cc = mul i64 %aa, %bb
ret i64 %cc
}