360 lines
12 KiB
LLVM
360 lines
12 KiB
LLVM
; Test 64-bit subtractions of constants from memory.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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declare i64 @foo()
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; Check subtraction of 1.
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define zeroext i1 @f1(i64 *%ptr) {
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; CHECK-LABEL: f1:
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; CHECK: algsi 0(%r2), -1
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; CHECK: ipm [[REG:%r[0-5]]]
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; CHECK: afi [[REG]], -536870912
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; CHECK: risbg %r2, [[REG]], 63, 191, 33
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; CHECK: br %r14
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%a = load i64, i64 *%ptr
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%t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 1)
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%val = extractvalue {i64, i1} %t, 0
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%obit = extractvalue {i64, i1} %t, 1
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store i64 %val, i64 *%ptr
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ret i1 %obit
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}
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; Check the high end of the constant range.
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define zeroext i1 @f2(i64 *%ptr) {
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; CHECK-LABEL: f2:
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; CHECK: algsi 0(%r2), -128
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; CHECK: ipm [[REG:%r[0-5]]]
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; CHECK: afi [[REG]], -536870912
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; CHECK: risbg %r2, [[REG]], 63, 191, 33
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; CHECK: br %r14
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%a = load i64, i64 *%ptr
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%t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 128)
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%val = extractvalue {i64, i1} %t, 0
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%obit = extractvalue {i64, i1} %t, 1
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store i64 %val, i64 *%ptr
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ret i1 %obit
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}
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; Check the next constant up, which must use an addition and a store.
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define zeroext i1 @f3(i64 %dummy, i64 *%ptr) {
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; CHECK-LABEL: f3:
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; CHECK: lg [[VAL:%r[0-5]]], 0(%r3)
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; CHECK: slgfi [[VAL]], 129
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; CHECK-DAG: stg [[VAL]], 0(%r3)
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; CHECK-DAG: ipm [[REG:%r[0-5]]]
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; CHECK-DAG: afi [[REG]], -536870912
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; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 33
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; CHECK: br %r14
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%a = load i64, i64 *%ptr
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%t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 129)
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%val = extractvalue {i64, i1} %t, 0
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%obit = extractvalue {i64, i1} %t, 1
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store i64 %val, i64 *%ptr
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ret i1 %obit
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}
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; Check the low end of the constant range.
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define zeroext i1 @f4(i64 *%ptr) {
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; CHECK-LABEL: f4:
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; CHECK: algsi 0(%r2), 127
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; CHECK: ipm [[REG:%r[0-5]]]
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; CHECK: afi [[REG]], -536870912
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; CHECK: risbg %r2, [[REG]], 63, 191, 33
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; CHECK: br %r14
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%a = load i64, i64 *%ptr
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%t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 -127)
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%val = extractvalue {i64, i1} %t, 0
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%obit = extractvalue {i64, i1} %t, 1
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store i64 %val, i64 *%ptr
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ret i1 %obit
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}
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; Check the next value down, with the same comment as f3.
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define zeroext i1 @f5(i64 %dummy, i64 *%ptr) {
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; CHECK-LABEL: f5:
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; CHECK: lg [[VAL1:%r[0-5]]], 0(%r3)
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; CHECK: lghi [[VAL2:%r[0-9]+]], -128
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; CHECK: slgr [[VAL1]], [[VAL2]]
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; CHECK-DAG: stg [[VAL1]], 0(%r3)
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; CHECK-DAG: ipm [[REG:%r[0-5]]]
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; CHECK-DAG: afi [[REG]], -536870912
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; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 33
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; CHECK: br %r14
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%a = load i64, i64 *%ptr
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%t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 -128)
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%val = extractvalue {i64, i1} %t, 0
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%obit = extractvalue {i64, i1} %t, 1
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store i64 %val, i64 *%ptr
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ret i1 %obit
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}
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; Check the high end of the aligned ALGSI range.
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define zeroext i1 @f6(i64 *%base) {
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; CHECK-LABEL: f6:
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; CHECK: algsi 524280(%r2), -1
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; CHECK: ipm [[REG:%r[0-5]]]
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; CHECK: afi [[REG]], -536870912
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; CHECK: risbg %r2, [[REG]], 63, 191, 33
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; CHECK: br %r14
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%ptr = getelementptr i64, i64 *%base, i64 65535
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%a = load i64, i64 *%ptr
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%t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 1)
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%val = extractvalue {i64, i1} %t, 0
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%obit = extractvalue {i64, i1} %t, 1
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store i64 %val, i64 *%ptr
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ret i1 %obit
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}
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; Check the next word up, which must use separate address logic.
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; Other sequences besides this one would be OK.
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define zeroext i1 @f7(i64 *%base) {
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; CHECK-LABEL: f7:
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; CHECK: agfi %r2, 524288
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; CHECK: algsi 0(%r2), -1
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; CHECK: ipm [[REG:%r[0-5]]]
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; CHECK: afi [[REG]], -536870912
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; CHECK: risbg %r2, [[REG]], 63, 191, 33
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; CHECK: br %r14
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%ptr = getelementptr i64, i64 *%base, i64 65536
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%a = load i64, i64 *%ptr
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%t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 1)
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%val = extractvalue {i64, i1} %t, 0
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%obit = extractvalue {i64, i1} %t, 1
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store i64 %val, i64 *%ptr
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ret i1 %obit
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}
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; Check the low end of the ALGSI range.
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define zeroext i1 @f8(i64 *%base) {
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; CHECK-LABEL: f8:
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; CHECK: algsi -524288(%r2), -1
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; CHECK: ipm [[REG:%r[0-5]]]
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; CHECK: afi [[REG]], -536870912
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; CHECK: risbg %r2, [[REG]], 63, 191, 33
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; CHECK: br %r14
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%ptr = getelementptr i64, i64 *%base, i64 -65536
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%a = load i64, i64 *%ptr
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%t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 1)
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%val = extractvalue {i64, i1} %t, 0
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%obit = extractvalue {i64, i1} %t, 1
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store i64 %val, i64 *%ptr
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ret i1 %obit
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}
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; Check the next word down, which must use separate address logic.
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; Other sequences besides this one would be OK.
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define zeroext i1 @f9(i64 *%base) {
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; CHECK-LABEL: f9:
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; CHECK: agfi %r2, -524296
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; CHECK: algsi 0(%r2), -1
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; CHECK: ipm [[REG:%r[0-5]]]
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; CHECK: afi [[REG]], -536870912
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; CHECK: risbg %r2, [[REG]], 63, 191, 33
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; CHECK: br %r14
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%ptr = getelementptr i64, i64 *%base, i64 -65537
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%a = load i64, i64 *%ptr
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%t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 1)
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%val = extractvalue {i64, i1} %t, 0
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%obit = extractvalue {i64, i1} %t, 1
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store i64 %val, i64 *%ptr
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ret i1 %obit
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}
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; Check that ALGSI does not allow indices.
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define zeroext i1 @f10(i64 %base, i64 %index) {
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; CHECK-LABEL: f10:
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; CHECK: agr %r2, %r3
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; CHECK: algsi 8(%r2), -1
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; CHECK: ipm [[REG:%r[0-5]]]
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; CHECK: afi [[REG]], -536870912
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; CHECK: risbg %r2, [[REG]], 63, 191, 33
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; CHECK: br %r14
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%add1 = add i64 %base, %index
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%add2 = add i64 %add1, 8
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%ptr = inttoptr i64 %add2 to i64 *
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%a = load i64, i64 *%ptr
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%t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 1)
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%val = extractvalue {i64, i1} %t, 0
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%obit = extractvalue {i64, i1} %t, 1
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store i64 %val, i64 *%ptr
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ret i1 %obit
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}
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; Check that subtracting 128 from a spilled value can use ALGSI.
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define zeroext i1 @f11(i64 *%ptr, i64 %sel) {
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; CHECK-LABEL: f11:
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; CHECK: algsi {{[0-9]+}}(%r15), -128
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; CHECK: br %r14
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entry:
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%val0 = load volatile i64, i64 *%ptr
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%val1 = load volatile i64, i64 *%ptr
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%val2 = load volatile i64, i64 *%ptr
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%val3 = load volatile i64, i64 *%ptr
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%val4 = load volatile i64, i64 *%ptr
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%val5 = load volatile i64, i64 *%ptr
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%val6 = load volatile i64, i64 *%ptr
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%val7 = load volatile i64, i64 *%ptr
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%val8 = load volatile i64, i64 *%ptr
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%val9 = load volatile i64, i64 *%ptr
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%val10 = load volatile i64, i64 *%ptr
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%val11 = load volatile i64, i64 *%ptr
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%val12 = load volatile i64, i64 *%ptr
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%val13 = load volatile i64, i64 *%ptr
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%val14 = load volatile i64, i64 *%ptr
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%val15 = load volatile i64, i64 *%ptr
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%test = icmp ne i64 %sel, 0
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br i1 %test, label %add, label %store
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add:
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%t0 = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %val0, i64 128)
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%add0 = extractvalue {i64, i1} %t0, 0
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%obit0 = extractvalue {i64, i1} %t0, 1
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%t1 = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %val1, i64 128)
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%add1 = extractvalue {i64, i1} %t1, 0
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%obit1 = extractvalue {i64, i1} %t1, 1
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%res1 = or i1 %obit0, %obit1
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%t2 = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %val2, i64 128)
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%add2 = extractvalue {i64, i1} %t2, 0
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%obit2 = extractvalue {i64, i1} %t2, 1
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%res2 = or i1 %res1, %obit2
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%t3 = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %val3, i64 128)
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%add3 = extractvalue {i64, i1} %t3, 0
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%obit3 = extractvalue {i64, i1} %t3, 1
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%res3 = or i1 %res2, %obit3
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%t4 = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %val4, i64 128)
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%add4 = extractvalue {i64, i1} %t4, 0
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%obit4 = extractvalue {i64, i1} %t4, 1
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%res4 = or i1 %res3, %obit4
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%t5 = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %val5, i64 128)
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%add5 = extractvalue {i64, i1} %t5, 0
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%obit5 = extractvalue {i64, i1} %t5, 1
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%res5 = or i1 %res4, %obit5
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%t6 = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %val6, i64 128)
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%add6 = extractvalue {i64, i1} %t6, 0
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%obit6 = extractvalue {i64, i1} %t6, 1
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%res6 = or i1 %res5, %obit6
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%t7 = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %val7, i64 128)
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%add7 = extractvalue {i64, i1} %t7, 0
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%obit7 = extractvalue {i64, i1} %t7, 1
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%res7 = or i1 %res6, %obit7
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%t8 = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %val8, i64 128)
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%add8 = extractvalue {i64, i1} %t8, 0
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%obit8 = extractvalue {i64, i1} %t8, 1
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%res8 = or i1 %res7, %obit8
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%t9 = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %val9, i64 128)
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%add9 = extractvalue {i64, i1} %t9, 0
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%obit9 = extractvalue {i64, i1} %t9, 1
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%res9 = or i1 %res8, %obit9
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%t10 = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %val10, i64 128)
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%add10 = extractvalue {i64, i1} %t10, 0
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%obit10 = extractvalue {i64, i1} %t10, 1
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%res10 = or i1 %res9, %obit10
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%t11 = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %val11, i64 128)
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%add11 = extractvalue {i64, i1} %t11, 0
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%obit11 = extractvalue {i64, i1} %t11, 1
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%res11 = or i1 %res10, %obit11
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%t12 = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %val12, i64 128)
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%add12 = extractvalue {i64, i1} %t12, 0
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%obit12 = extractvalue {i64, i1} %t12, 1
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%res12 = or i1 %res11, %obit12
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%t13 = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %val13, i64 128)
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%add13 = extractvalue {i64, i1} %t13, 0
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%obit13 = extractvalue {i64, i1} %t13, 1
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%res13 = or i1 %res12, %obit13
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%t14 = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %val14, i64 128)
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%add14 = extractvalue {i64, i1} %t14, 0
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%obit14 = extractvalue {i64, i1} %t14, 1
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%res14 = or i1 %res13, %obit14
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%t15 = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %val15, i64 128)
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%add15 = extractvalue {i64, i1} %t15, 0
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%obit15 = extractvalue {i64, i1} %t15, 1
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%res15 = or i1 %res14, %obit15
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br label %store
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store:
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%new0 = phi i64 [ %val0, %entry ], [ %add0, %add ]
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%new1 = phi i64 [ %val1, %entry ], [ %add1, %add ]
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%new2 = phi i64 [ %val2, %entry ], [ %add2, %add ]
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%new3 = phi i64 [ %val3, %entry ], [ %add3, %add ]
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%new4 = phi i64 [ %val4, %entry ], [ %add4, %add ]
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%new5 = phi i64 [ %val5, %entry ], [ %add5, %add ]
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%new6 = phi i64 [ %val6, %entry ], [ %add6, %add ]
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%new7 = phi i64 [ %val7, %entry ], [ %add7, %add ]
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%new8 = phi i64 [ %val8, %entry ], [ %add8, %add ]
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%new9 = phi i64 [ %val9, %entry ], [ %add9, %add ]
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%new10 = phi i64 [ %val10, %entry ], [ %add10, %add ]
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%new11 = phi i64 [ %val11, %entry ], [ %add11, %add ]
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%new12 = phi i64 [ %val12, %entry ], [ %add12, %add ]
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%new13 = phi i64 [ %val13, %entry ], [ %add13, %add ]
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%new14 = phi i64 [ %val14, %entry ], [ %add14, %add ]
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%new15 = phi i64 [ %val15, %entry ], [ %add15, %add ]
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%res = phi i1 [ 0, %entry ], [ %res15, %add ]
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store volatile i64 %new0, i64 *%ptr
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store volatile i64 %new1, i64 *%ptr
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store volatile i64 %new2, i64 *%ptr
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store volatile i64 %new3, i64 *%ptr
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store volatile i64 %new4, i64 *%ptr
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store volatile i64 %new5, i64 *%ptr
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store volatile i64 %new6, i64 *%ptr
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store volatile i64 %new7, i64 *%ptr
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store volatile i64 %new8, i64 *%ptr
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store volatile i64 %new9, i64 *%ptr
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store volatile i64 %new10, i64 *%ptr
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store volatile i64 %new11, i64 *%ptr
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store volatile i64 %new12, i64 *%ptr
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store volatile i64 %new13, i64 *%ptr
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store volatile i64 %new14, i64 *%ptr
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store volatile i64 %new15, i64 *%ptr
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ret i1 %res
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}
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; Check using the overflow result for a branch.
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define void @f12(i64 *%ptr) {
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; CHECK-LABEL: f12:
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; CHECK: algsi 0(%r2), -1
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; CHECK: jgle foo@PLT
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; CHECK: br %r14
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%a = load i64, i64 *%ptr
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%t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 1)
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%val = extractvalue {i64, i1} %t, 0
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%obit = extractvalue {i64, i1} %t, 1
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store i64 %val, i64 *%ptr
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br i1 %obit, label %call, label %exit
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call:
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tail call i64 @foo()
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br label %exit
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exit:
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ret void
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}
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; ... and the same with the inverted direction.
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define void @f13(i64 *%ptr) {
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; CHECK-LABEL: f13:
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; CHECK: algsi 0(%r2), -1
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; CHECK: jgnle foo@PLT
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; CHECK: br %r14
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%a = load i64, i64 *%ptr
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%t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 1)
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%val = extractvalue {i64, i1} %t, 0
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%obit = extractvalue {i64, i1} %t, 1
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store i64 %val, i64 *%ptr
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br i1 %obit, label %exit, label %call
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call:
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tail call i64 @foo()
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br label %exit
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exit:
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ret void
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}
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declare {i64, i1} @llvm.usub.with.overflow.i64(i64, i64) nounwind readnone
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