537 lines
18 KiB
LLVM
537 lines
18 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
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; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s \
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; RUN: | FileCheck %s
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; RUN: llc -verify-machineinstrs -target-abi=elfv2 -mtriple=powerpc64-- \
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; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s \
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; RUN: | FileCheck %s
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@_ZL13StaticBoolVar = internal unnamed_addr global i8 0, align 1
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@_ZL19StaticSignedCharVar = internal unnamed_addr global i8 0, align 1
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@_ZL21StaticUnsignedCharVar = internal unnamed_addr global i8 0, align 1
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@_ZL20StaticSignedShortVar = internal unnamed_addr global i16 0, align 2
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@_ZL22StaticUnsignedShortVar = internal unnamed_addr global i16 0, align 2
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@_ZL18StaticSignedIntVar = internal unnamed_addr global i32 0, align 4
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@_ZL20StaticUnsignedIntVar = internal unnamed_addr global i32 0, align 4
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@_ZL19StaticSignedLongVar = internal unnamed_addr global i64 0, align 8
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@_ZL14StaticFloatVar = internal unnamed_addr global float 0.000000e+00, align 4
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@_ZL15StaticDoubleVar = internal unnamed_addr global double 0.000000e+00, align 8
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@_ZL19StaticLongDoubleVar = internal unnamed_addr global ppc_fp128 0xM00000000000000000000000000000000, align 16
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@_ZL23StaticSigned__Int128Var = internal unnamed_addr global i128 0, align 16
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@_ZL19Static__Float128Var = internal unnamed_addr global fp128 0xL00000000000000000000000000000000, align 16
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@_ZL25StaticVectorSignedCharVar = internal unnamed_addr global <16 x i8> zeroinitializer, align 16
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@_ZL26StaticVectorSignedShortVar = internal unnamed_addr global <8 x i16> zeroinitializer, align 16
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@_ZL24StaticVectorSignedIntVar = internal unnamed_addr global <4 x i32> zeroinitializer, align 16
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@_ZL29StaticVectorSignedLongLongVar = internal unnamed_addr global <2 x i64> zeroinitializer, align 16
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@_ZL29StaticVectorSigned__Int128Var = internal unnamed_addr global <1 x i128> zeroinitializer, align 16
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@_ZL20StaticVectorFloatVar = internal unnamed_addr global <4 x float> zeroinitializer, align 16
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@_ZL21StaticVectorDoubleVar = internal unnamed_addr global <2 x double> zeroinitializer, align 16
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define zeroext i1 @_Z17ReadStaticBoolVarv() {
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; CHECK-LABEL: _Z17ReadStaticBoolVarv:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: plbz r3, _ZL13StaticBoolVar@PCREL(0), 1
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; CHECK-NEXT: blr
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entry:
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%0 = load i8, i8* @_ZL13StaticBoolVar, align 1, !range !0
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%tobool = icmp ne i8 %0, 0
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ret i1 %tobool
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}
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define signext i8 @_Z23ReadStaticSignedCharVarv() {
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; CHECK-LABEL: _Z23ReadStaticSignedCharVarv:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: plbz r3, _ZL19StaticSignedCharVar@PCREL(0), 1
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; CHECK-NEXT: extsb r3, r3
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; CHECK-NEXT: blr
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entry:
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%0 = load i8, i8* @_ZL19StaticSignedCharVar, align 1
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ret i8 %0
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}
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define zeroext i8 @_Z25ReadStaticUnsignedCharVarv() {
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; CHECK-LABEL: _Z25ReadStaticUnsignedCharVarv:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: plbz r3, _ZL21StaticUnsignedCharVar@PCREL(0), 1
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; CHECK-NEXT: blr
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entry:
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%0 = load i8, i8* @_ZL21StaticUnsignedCharVar, align 1
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ret i8 %0
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}
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define signext i16 @_Z24ReadStaticSignedShortVarv() {
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; CHECK-LABEL: _Z24ReadStaticSignedShortVarv:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: plha r3, _ZL20StaticSignedShortVar@PCREL(0), 1
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; CHECK-NEXT: blr
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entry:
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%0 = load i16, i16* @_ZL20StaticSignedShortVar, align 2
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ret i16 %0
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}
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define zeroext i16 @_Z26ReadStaticUnsignedShortVarv() {
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; CHECK-LABEL: _Z26ReadStaticUnsignedShortVarv:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: plhz r3, _ZL22StaticUnsignedShortVar@PCREL(0), 1
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; CHECK-NEXT: blr
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entry:
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%0 = load i16, i16* @_ZL22StaticUnsignedShortVar, align 2
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ret i16 %0
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}
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define signext i32 @_Z22ReadStaticSignedIntVarv() {
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; CHECK-LABEL: _Z22ReadStaticSignedIntVarv:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: plwa r3, _ZL18StaticSignedIntVar@PCREL(0), 1
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; CHECK-NEXT: blr
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entry:
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%0 = load i32, i32* @_ZL18StaticSignedIntVar, align 4
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ret i32 %0
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}
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define zeroext i32 @_Z24ReadStaticUnsignedIntVarv() {
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; CHECK-LABEL: _Z24ReadStaticUnsignedIntVarv:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: plwz r3, _ZL20StaticUnsignedIntVar@PCREL(0), 1
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; CHECK-NEXT: blr
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entry:
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%0 = load i32, i32* @_ZL20StaticUnsignedIntVar, align 4
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ret i32 %0
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}
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; It is the same as unsigned long version
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define i64 @_Z23ReadStaticSignedLongVarv() {
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; CHECK-LABEL: _Z23ReadStaticSignedLongVarv:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pld r3, _ZL19StaticSignedLongVar@PCREL(0), 1
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; CHECK-NEXT: blr
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entry:
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%0 = load i64, i64* @_ZL19StaticSignedLongVar, align 8
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ret i64 %0
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}
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define float @_Z18ReadStaticFloatVarv() {
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; CHECK-LABEL: _Z18ReadStaticFloatVarv:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: plfs f1, _ZL14StaticFloatVar@PCREL(0), 1
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; CHECK-NEXT: blr
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entry:
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%0 = load float, float* @_ZL14StaticFloatVar, align 4
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ret float %0
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}
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define double @_Z19ReadStaticDoubleVarv() {
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; CHECK-LABEL: _Z19ReadStaticDoubleVarv:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: plfd f1, _ZL15StaticDoubleVar@PCREL(0), 1
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; CHECK-NEXT: blr
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entry:
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%0 = load double, double* @_ZL15StaticDoubleVar, align 8
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ret double %0
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}
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; FIXME:
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define ppc_fp128 @_Z23ReadStaticLongDoubleVarv() {
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; CHECK-LABEL: _Z23ReadStaticLongDoubleVarv:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: plfd f1, _ZL19StaticLongDoubleVar@PCREL(0), 1
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; CHECK-NEXT: plfd f2, _ZL19StaticLongDoubleVar@PCREL+8(0), 1
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; CHECK-NEXT: blr
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entry:
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%0 = load ppc_fp128, ppc_fp128* @_ZL19StaticLongDoubleVar, align 16
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ret ppc_fp128 %0
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}
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; FIXME:
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define i128 @_Z27ReadStaticSigned__Int128Varv() {
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; CHECK-LABEL: _Z27ReadStaticSigned__Int128Varv:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pld r3, _ZL23StaticSigned__Int128Var@PCREL(0), 1
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; CHECK-NEXT: pld r4, _ZL23StaticSigned__Int128Var@PCREL+8(0), 1
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; CHECK-NEXT: blr
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entry:
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%0 = load i128, i128* @_ZL23StaticSigned__Int128Var, align 16
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ret i128 %0
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}
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define fp128 @_Z23ReadStatic__Float128Varv() {
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; CHECK-LABEL: _Z23ReadStatic__Float128Varv:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: plxv v2, _ZL19Static__Float128Var@PCREL(0), 1
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; CHECK-NEXT: blr
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entry:
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%0 = load fp128, fp128* @_ZL19Static__Float128Var, align 16
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ret fp128 %0
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}
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define <16 x i8> @_Z29ReadStaticVectorSignedCharVarv() {
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; CHECK-LABEL: _Z29ReadStaticVectorSignedCharVarv:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: plxv v2, _ZL25StaticVectorSignedCharVar@PCREL(0), 1
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; CHECK-NEXT: blr
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entry:
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%0 = load <16 x i8>, <16 x i8>* @_ZL25StaticVectorSignedCharVar, align 16
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ret <16 x i8> %0
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}
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define <8 x i16> @_Z30ReadStaticVectorSignedShortVarv() {
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; CHECK-LABEL: _Z30ReadStaticVectorSignedShortVarv:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: plxv v2, _ZL26StaticVectorSignedShortVar@PCREL(0), 1
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; CHECK-NEXT: blr
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entry:
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%0 = load <8 x i16>, <8 x i16>* @_ZL26StaticVectorSignedShortVar, align 16
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ret <8 x i16> %0
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}
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define <4 x i32> @_Z28ReadStaticVectorSignedIntVarv() {
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; CHECK-LABEL: _Z28ReadStaticVectorSignedIntVarv:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: plxv v2, _ZL24StaticVectorSignedIntVar@PCREL(0), 1
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; CHECK-NEXT: blr
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entry:
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%0 = load <4 x i32>, <4 x i32>* @_ZL24StaticVectorSignedIntVar, align 16
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ret <4 x i32> %0
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}
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define <2 x i64> @_Z33ReadStaticVectorSignedLongLongVarv() {
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; CHECK-LABEL: _Z33ReadStaticVectorSignedLongLongVarv:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: plxv v2, _ZL29StaticVectorSignedLongLongVar@PCREL(0), 1
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; CHECK-NEXT: blr
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entry:
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%0 = load <2 x i64>, <2 x i64>* @_ZL29StaticVectorSignedLongLongVar, align 16
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ret <2 x i64> %0
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}
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define <1 x i128> @_Z33ReadStaticVectorSigned__Int128Varv() {
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; CHECK-LABEL: _Z33ReadStaticVectorSigned__Int128Varv:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: plxv v2, _ZL29StaticVectorSigned__Int128Var@PCREL(0), 1
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; CHECK-NEXT: blr
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entry:
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%0 = load <1 x i128>, <1 x i128>* @_ZL29StaticVectorSigned__Int128Var, align 16
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ret <1 x i128> %0
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}
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define <4 x float> @_Z24ReadStaticVectorFloatVarv() {
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; CHECK-LABEL: _Z24ReadStaticVectorFloatVarv:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: plxv v2, _ZL20StaticVectorFloatVar@PCREL(0), 1
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; CHECK-NEXT: blr
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entry:
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%0 = load <4 x float>, <4 x float>* @_ZL20StaticVectorFloatVar, align 16
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ret <4 x float> %0
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}
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define <2 x double> @_Z25ReadStaticVectorDoubleVarv() {
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; CHECK-LABEL: _Z25ReadStaticVectorDoubleVarv:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: plxv v2, _ZL21StaticVectorDoubleVar@PCREL(0), 1
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; CHECK-NEXT: blr
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entry:
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%0 = load <2 x double>, <2 x double>* @_ZL21StaticVectorDoubleVar, align 16
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ret <2 x double> %0
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}
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!0 = !{i8 0, i8 2}
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define void @_Z18WriteStaticBoolVarb(i1 zeroext %val) {
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; CHECK-LABEL: _Z18WriteStaticBoolVarb:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pstb r3, _ZL13StaticBoolVar@PCREL(0), 1
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; CHECK-NEXT: blr
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entry:
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%frombool = zext i1 %val to i8
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store i8 %frombool, i8* @_ZL13StaticBoolVar, align 1
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ret void
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}
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define void @_Z24WriteStaticSignedCharVara(i8 signext %val) {
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; CHECK-LABEL: _Z24WriteStaticSignedCharVara:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pstb r3, _ZL19StaticSignedCharVar@PCREL(0), 1
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; CHECK-NEXT: blr
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entry:
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store i8 %val, i8* @_ZL19StaticSignedCharVar, align 1
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ret void
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}
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define void @_Z26WriteStaticUnsignedCharVarh(i8 zeroext %val){
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; CHECK-LABEL: _Z26WriteStaticUnsignedCharVarh:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pstb r3, _ZL21StaticUnsignedCharVar@PCREL(0), 1
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; CHECK-NEXT: blr
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entry:
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store i8 %val, i8* @_ZL21StaticUnsignedCharVar, align 1
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ret void
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}
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define void @_Z25WriteStaticSignedShortVars(i16 signext %val) {
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; CHECK-LABEL: _Z25WriteStaticSignedShortVars:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: psth r3, _ZL20StaticSignedShortVar@PCREL(0), 1
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; CHECK-NEXT: blr
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entry:
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store i16 %val, i16* @_ZL20StaticSignedShortVar, align 2
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ret void
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}
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define void @_Z27WriteStaticUnsignedShortVart(i16 zeroext %val) {
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; CHECK-LABEL: _Z27WriteStaticUnsignedShortVart:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: psth r3, _ZL22StaticUnsignedShortVar@PCREL(0), 1
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; CHECK-NEXT: blr
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entry:
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store i16 %val, i16* @_ZL22StaticUnsignedShortVar, align 2
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ret void
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}
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define void @_Z23WriteStaticSignedIntVari(i32 signext %val) {
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; CHECK-LABEL: _Z23WriteStaticSignedIntVari:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pstw r3, _ZL18StaticSignedIntVar@PCREL(0), 1
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; CHECK-NEXT: blr
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entry:
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store i32 %val, i32* @_ZL18StaticSignedIntVar, align 4
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ret void
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}
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define void @_Z25WriteStaticUnsignedIntVarj(i32 zeroext %val) {
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; CHECK-LABEL: _Z25WriteStaticUnsignedIntVarj:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pstw r3, _ZL20StaticUnsignedIntVar@PCREL(0), 1
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; CHECK-NEXT: blr
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entry:
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store i32 %val, i32* @_ZL20StaticUnsignedIntVar, align 4
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ret void
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}
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define void @_Z24WriteStaticSignedLongVarl(i64 %val) {
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; CHECK-LABEL: _Z24WriteStaticSignedLongVarl:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pstd r3, _ZL19StaticSignedLongVar@PCREL(0), 1
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; CHECK-NEXT: blr
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entry:
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store i64 %val, i64* @_ZL19StaticSignedLongVar, align 8
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ret void
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}
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define void @_Z19WriteStaticFloatVarf(float %val) {
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; CHECK-LABEL: _Z19WriteStaticFloatVarf:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pstfs f1, _ZL14StaticFloatVar@PCREL(0), 1
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; CHECK-NEXT: blr
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entry:
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store float %val, float* @_ZL14StaticFloatVar, align 4
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ret void
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}
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define void @_Z20WriteStaticDoubleVard(double %val) {
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; CHECK-LABEL: _Z20WriteStaticDoubleVard:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pstfd f1, _ZL15StaticDoubleVar@PCREL(0), 1
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; CHECK-NEXT: blr
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entry:
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store double %val, double* @_ZL15StaticDoubleVar, align 8
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ret void
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}
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; FIXME:
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define void @_Z24WriteStaticLongDoubleVarg(ppc_fp128 %val) {
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; CHECK-LABEL: _Z24WriteStaticLongDoubleVarg:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pstfd f2, _ZL19StaticLongDoubleVar@PCREL+8(0), 1
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; CHECK-NEXT: pstfd f1, _ZL19StaticLongDoubleVar@PCREL(0), 1
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; CHECK-NEXT: blr
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entry:
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store ppc_fp128 %val, ppc_fp128* @_ZL19StaticLongDoubleVar, align 16
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ret void
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}
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; FIXME:
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define void @_Z28WriteStaticSigned__Int128Varn(i128 %val) {
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; CHECK-LABEL: _Z28WriteStaticSigned__Int128Varn:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pstd r4, _ZL23StaticSigned__Int128Var@PCREL+8(0), 1
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; CHECK-NEXT: pstd r3, _ZL23StaticSigned__Int128Var@PCREL(0), 1
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; CHECK-NEXT: blr
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entry:
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store i128 %val, i128* @_ZL23StaticSigned__Int128Var, align 16
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ret void
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}
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define void @_Z24WriteStatic__Float128Varu9__ieee128(fp128 %val) {
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; CHECK-LABEL: _Z24WriteStatic__Float128Varu9__ieee128:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pstxv v2, _ZL19Static__Float128Var@PCREL(0), 1
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; CHECK-NEXT: blr
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entry:
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store fp128 %val, fp128* @_ZL19Static__Float128Var, align 16
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ret void
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}
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define void @_Z30WriteStaticVectorSignedCharVarDv16_a(<16 x i8> %val) {
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; CHECK-LABEL: _Z30WriteStaticVectorSignedCharVarDv16_a:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pstxv v2, _ZL25StaticVectorSignedCharVar@PCREL(0), 1
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; CHECK-NEXT: blr
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entry:
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store <16 x i8> %val, <16 x i8>* @_ZL25StaticVectorSignedCharVar, align 16
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ret void
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}
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define void @_Z31WriteStaticVectorSignedShortVarDv8_s(<8 x i16> %val) {
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; CHECK-LABEL: _Z31WriteStaticVectorSignedShortVarDv8_s:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pstxv v2, _ZL26StaticVectorSignedShortVar@PCREL(0), 1
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; CHECK-NEXT: blr
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entry:
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store <8 x i16> %val, <8 x i16>* @_ZL26StaticVectorSignedShortVar, align 16
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ret void
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}
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define void @_Z29WriteStaticVectorSignedIntVarDv4_i(<4 x i32> %val) {
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; CHECK-LABEL: _Z29WriteStaticVectorSignedIntVarDv4_i:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pstxv v2, _ZL24StaticVectorSignedIntVar@PCREL(0), 1
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; CHECK-NEXT: blr
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entry:
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store <4 x i32> %val, <4 x i32>* @_ZL24StaticVectorSignedIntVar, align 16
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ret void
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}
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define void @_Z34WriteStaticVectorSignedLongLongVarDv2_x(<2 x i64> %val) {
|
|
; CHECK-LABEL: _Z34WriteStaticVectorSignedLongLongVarDv2_x:
|
|
; CHECK: # %bb.0: # %entry
|
|
; CHECK-NEXT: pstxv v2, _ZL29StaticVectorSignedLongLongVar@PCREL(0), 1
|
|
; CHECK-NEXT: blr
|
|
entry:
|
|
store <2 x i64> %val, <2 x i64>* @_ZL29StaticVectorSignedLongLongVar, align 16
|
|
ret void
|
|
}
|
|
|
|
define void @_Z34WriteStaticVectorSigned__Int128VarDv1_n(<1 x i128> %val) {
|
|
; CHECK-LABEL: _Z34WriteStaticVectorSigned__Int128VarDv1_n:
|
|
; CHECK: # %bb.0: # %entry
|
|
; CHECK-NEXT: pstxv v2, _ZL29StaticVectorSigned__Int128Var@PCREL(0), 1
|
|
; CHECK-NEXT: blr
|
|
entry:
|
|
store <1 x i128> %val, <1 x i128>* @_ZL29StaticVectorSigned__Int128Var, align 16
|
|
ret void
|
|
}
|
|
|
|
define void @_Z25WriteStaticVectorFloatVarDv4_f(<4 x float> %val) {
|
|
; CHECK-LABEL: _Z25WriteStaticVectorFloatVarDv4_f:
|
|
; CHECK: # %bb.0: # %entry
|
|
; CHECK-NEXT: pstxv v2, _ZL20StaticVectorFloatVar@PCREL(0), 1
|
|
; CHECK-NEXT: blr
|
|
entry:
|
|
store <4 x float> %val, <4 x float>* @_ZL20StaticVectorFloatVar, align 16
|
|
ret void
|
|
}
|
|
|
|
define void @_Z26WriteStaticVectorDoubleVarDv2_d(<2 x double> %val) {
|
|
; CHECK-LABEL: _Z26WriteStaticVectorDoubleVarDv2_d:
|
|
; CHECK: # %bb.0: # %entry
|
|
; CHECK-NEXT: pstxv v2, _ZL21StaticVectorDoubleVar@PCREL(0), 1
|
|
; CHECK-NEXT: blr
|
|
entry:
|
|
store <2 x double> %val, <2 x double>* @_ZL21StaticVectorDoubleVar, align 16
|
|
ret void
|
|
}
|
|
|
|
@_ZL3ptr = internal unnamed_addr global i32* null, align 8
|
|
define void @_Z14WriteStaticPtrv() {
|
|
; CHECK-LABEL: _Z14WriteStaticPtrv:
|
|
; CHECK: # %bb.0: # %entry
|
|
; CHECK-NEXT: pld r3, _ZL3ptr@PCREL(0), 1
|
|
; CHECK-NEXT: li r4, 3
|
|
; CHECK-NEXT: stw r4, 0(r3)
|
|
; CHECK-NEXT: blr
|
|
entry:
|
|
%0 = load i32*, i32** @_ZL3ptr, align 8
|
|
store i32 3, i32* %0, align 4
|
|
ret void
|
|
}
|
|
|
|
@.str = private unnamed_addr constant [13 x i8] c"Hello World\0A\00", align 1
|
|
@str = dso_local local_unnamed_addr global i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), align 8
|
|
|
|
define zeroext i8 @_Z17Char0InStrLiteralv() {
|
|
; CHECK-LABEL: _Z17Char0InStrLiteralv:
|
|
; CHECK: # %bb.0: # %entry
|
|
; CHECK-NEXT: pld r3, str@PCREL(0), 1
|
|
; CHECK-NEXT: lbz r3, 0(r3)
|
|
; CHECK-NEXT: blr
|
|
entry:
|
|
%0 = load i8*, i8** @str, align 8
|
|
%1 = load i8, i8* %0, align 1
|
|
ret i8 %1
|
|
}
|
|
|
|
define zeroext i8 @_Z17Char3InStrLiteralv() {
|
|
; CHECK-LABEL: _Z17Char3InStrLiteralv:
|
|
; CHECK: # %bb.0: # %entry
|
|
; CHECK-NEXT: pld r3, str@PCREL(0), 1
|
|
; CHECK-NEXT: lbz r3, 3(r3)
|
|
; CHECK-NEXT: blr
|
|
entry:
|
|
%0 = load i8*, i8** @str, align 8
|
|
%arrayidx = getelementptr inbounds i8, i8* %0, i64 3
|
|
%1 = load i8, i8* %arrayidx, align 1
|
|
ret i8 %1
|
|
}
|
|
|
|
@_ZL5array = internal global [10 x i32] zeroinitializer, align 4
|
|
|
|
; FIXME:
|
|
define signext i32 @_Z15ReadStaticArrayv() {
|
|
; CHECK-LABEL: _Z15ReadStaticArrayv:
|
|
; CHECK: # %bb.0: # %entry
|
|
; CHECK-NEXT: plwa r3, _ZL5array@PCREL+12(0), 1
|
|
; CHECK-NEXT: blr
|
|
entry:
|
|
%0 = load i32, i32* getelementptr inbounds ([10 x i32], [10 x i32]* @_ZL5array, i64 0, i64 3), align 4
|
|
ret i32 %0
|
|
}
|
|
|
|
; FIXME:
|
|
define void @_Z16WriteStaticArrayv() {
|
|
; CHECK-LABEL: _Z16WriteStaticArrayv:
|
|
; CHECK: # %bb.0: # %entry
|
|
; CHECK-NEXT: li r3, 5
|
|
; CHECK-NEXT: pstw r3, _ZL5array@PCREL+12(0), 1
|
|
; CHECK-NEXT: blr
|
|
entry:
|
|
store i32 5, i32* getelementptr inbounds ([10 x i32], [10 x i32]* @_ZL5array, i64 0, i64 3), align 4
|
|
ret void
|
|
}
|
|
|
|
%struct.Struct = type { i8, i16, i32 }
|
|
|
|
; FIXME:
|
|
@_ZL9structure = internal global %struct.Struct zeroinitializer, align 4
|
|
define signext i32 @_Z16ReadStaticStructv() {
|
|
; CHECK-LABEL: _Z16ReadStaticStructv:
|
|
; CHECK: # %bb.0: # %entry
|
|
; CHECK-NEXT: plwa r3, _ZL9structure@PCREL+4(0), 1
|
|
; CHECK-NEXT: blr
|
|
entry:
|
|
%0 = load i32, i32* getelementptr inbounds (%struct.Struct, %struct.Struct* @_ZL9structure, i64 0, i32 2), align 4
|
|
ret i32 %0
|
|
}
|
|
|
|
; FIXME
|
|
define void @_Z17WriteStaticStructv() {
|
|
; CHECK-LABEL: _Z17WriteStaticStructv:
|
|
; CHECK: # %bb.0: # %entry
|
|
; CHECK-NEXT: li r3, 3
|
|
; CHECK-NEXT: pstw r3, _ZL9structure@PCREL+4(0), 1
|
|
; CHECK-NEXT: blr
|
|
entry:
|
|
store i32 3, i32* getelementptr inbounds (%struct.Struct, %struct.Struct* @_ZL9structure, i64 0, i32 2), align 4
|
|
ret void
|
|
}
|
|
|