llvm-for-llvmta/test/CodeGen/AMDGPU/GlobalISel/regbankselect-unmerge-value...

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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -march=amdgcn -mcpu=gfx908 -run-pass=regbankselect -global-isel %s -verify-machineinstrs -o - -regbankselect-fast | FileCheck %s
---
name: test_unmerge_s64_s32_s
legalized: true
body: |
bb.0:
liveins: $sgpr0_sgpr1
; CHECK-LABEL: name: test_unmerge_s64_s32_s
; CHECK: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
; CHECK: [[UV:%[0-9]+]]:sgpr(s32), [[UV1:%[0-9]+]]:sgpr(s32) = G_UNMERGE_VALUES [[COPY]](s64)
; CHECK: $vgpr0 = COPY [[UV]](s32)
; CHECK: $vgpr2 = COPY [[UV]](s32)
%0:_(s64) = COPY $sgpr0_sgpr1
%1:_(s32), %2:_(s32) = G_UNMERGE_VALUES %0:_(s64)
$vgpr0 = COPY %1(s32)
$vgpr2 = COPY %1(s32)
...
---
name: test_unmerge_s64_s32_v
legalized: true
body: |
bb.0:
liveins: $vgpr0_vgpr1
; CHECK-LABEL: name: test_unmerge_s64_s32_v
; CHECK: [[COPY:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1
; CHECK: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY]](s64)
; CHECK: $vgpr0 = COPY [[UV]](s32)
; CHECK: $vgpr2 = COPY [[UV]](s32)
%0:_(s64) = COPY $vgpr0_vgpr1
%1:_(s32), %2:_(s32) = G_UNMERGE_VALUES %0:_(s64)
$vgpr0 = COPY %1(s32)
$vgpr2 = COPY %1(s32)
...
---
name: test_unmerge_s32_s64_a
legalized: true
body: |
bb.0:
liveins: $agpr0_agpr1
; CHECK-LABEL: name: test_unmerge_s32_s64_a
; CHECK: [[COPY:%[0-9]+]]:agpr(s64) = COPY $agpr0_agpr1
; CHECK: [[UV:%[0-9]+]]:agpr(s32), [[UV1:%[0-9]+]]:agpr(s32) = G_UNMERGE_VALUES [[COPY]](s64)
; CHECK: $agpr0 = COPY [[UV]](s32)
; CHECK: $agpr2 = COPY [[UV1]](s32)
%0:_(s64) = COPY $agpr0_agpr1
%1:_(s32), %2:_(s32) = G_UNMERGE_VALUES %0:_(s64)
$agpr0 = COPY %1
$agpr2 = COPY %2
...