llvm-for-llvmta/test/CodeGen/AMDGPU/GlobalISel/regbankselect-constant.mir

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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -march=amdgcn -mcpu=hawaii -run-pass=regbankselect -regbankselect-fast -verify-machineinstrs -o - %s | FileCheck %s
# RUN: llc -march=amdgcn -mcpu=hawaii -run-pass=regbankselect -regbankselect-greedy -verify-machineinstrs -o - %s | FileCheck %s
---
name: test_constant_s32_vgpr_use
legalized: true
body: |
bb.0:
liveins: $vgpr0_vgpr1
; CHECK-LABEL: name: test_constant_s32_vgpr_use
; CHECK: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
; CHECK: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 1
; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY [[C]](s32)
; CHECK: G_STORE [[COPY1]](s32), [[COPY]](p1) :: (store 4)
%0:_(p1) = COPY $vgpr0_vgpr1
%1:_(s32) = G_CONSTANT i32 1
G_STORE %1, %0 :: (store 4)
...
---
name: test_constant_s32_sgpr_use
legalized: true
body: |
bb.0:
; CHECK-LABEL: name: test_constant_s32_sgpr_use
; CHECK: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 1
; CHECK: G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.s.sendmsg), 0, [[C]](s32)
%0:_(s32) = G_CONSTANT i32 1
G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.s.sendmsg), 0, %0
...