llvm-for-llvmta/test/CodeGen/AMDGPU/GlobalISel/legalize-jump-table.mir

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# RUN: not --crash llc -march=amdgcn -run-pass=legalizer -o /dev/null %s 2>&1 | FileCheck %s
# CHECK: LLVM ERROR: unable to legalize instruction: %3:_(p0) = G_JUMP_TABLE %jump-table.0 (in function: jt_test)
# FIXME: This could probably be smaller, but the jump table MIR parsing is very crashy.
--- |
define i32 @jt_test(i32 %x) {
entry:
switch i32 %x, label %return [
i32 75, label %sw.bb
i32 34, label %sw.bb
i32 56, label %sw.bb
i32 35, label %sw.bb
i32 40, label %sw.bb
i32 4, label %sw.bb1
i32 5, label %sw.bb1
i32 6, label %sw.bb1
]
sw.bb: ; preds = %entry, %entry, %entry, %entry, %entry
%add = add nsw i32 %x, 42
br label %return
sw.bb1: ; preds = %entry, %entry, %entry
%mul = mul nsw i32 %x, 3
br label %return
return: ; preds = %sw.bb1, %sw.bb, %entry
%retval.0 = phi i32 [ %mul, %sw.bb1 ], [ %add, %sw.bb ], [ 0, %entry ]
ret i32 %retval.0
}
...
---
name: jt_test
tracksRegLiveness: true
jumpTable:
kind: block-address
entries:
- id: 0
blocks: [ '%bb.3', '%bb.3', '%bb.3', '%bb.4', '%bb.4', '%bb.4',
'%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4',
'%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4',
'%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4',
'%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4',
'%bb.2', '%bb.2', '%bb.4', '%bb.4', '%bb.4', '%bb.4',
'%bb.2', '%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4',
'%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4',
'%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.2', '%bb.4',
'%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4',
'%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4',
'%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.2' ]
body: |
bb.0.entry:
liveins: $sgpr0
%0:_(s32) = COPY $sgpr0
%1:_(s32) = G_CONSTANT i32 0
%2:_(s1) = G_ICMP intpred(ugt), %0, %1
%3:_(p0) = G_JUMP_TABLE %jump-table.0
S_NOP 0, implicit %3
G_BRCOND %2, %bb.4
bb.1.entry:
successors: %bb.3(0x2aaaaaab), %bb.4(0x2aaaaaab), %bb.2(0x2aaaaaab)
G_BR %bb.4
bb.2.sw.bb:
G_BR %bb.4
bb.3.sw.bb1:
bb.4.return:
S_ENDPGM 0
...