163 lines
6.6 KiB
YAML
163 lines
6.6 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -run-pass=legalizer -o - %s | FileCheck -check-prefix=SI %s
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# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=hawaii -run-pass=legalizer -o - %s | FileCheck -check-prefix=CI %s
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---
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name: test_frint_s16
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body: |
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bb.0:
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liveins: $vgpr0
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; SI-LABEL: name: test_frint_s16
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; SI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
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; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
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; SI: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC]](s16)
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; SI: [[FRINT:%[0-9]+]]:_(s32) = G_FRINT [[FPEXT]]
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; SI: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[FRINT]](s32)
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; SI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FPTRUNC]](s16)
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; SI: $vgpr0 = COPY [[ANYEXT]](s32)
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; CI-LABEL: name: test_frint_s16
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; CI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
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; CI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
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; CI: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC]](s16)
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; CI: [[FRINT:%[0-9]+]]:_(s32) = G_FRINT [[FPEXT]]
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; CI: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[FRINT]](s32)
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; CI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FPTRUNC]](s16)
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; CI: $vgpr0 = COPY [[ANYEXT]](s32)
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%0:_(s32) = COPY $vgpr0
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%1:_(s16) = G_TRUNC %0
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%2:_(s16) = G_FRINT %1
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%3:_(s32) = G_ANYEXT %2
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$vgpr0 = COPY %3
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...
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---
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name: test_frint_s32
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body: |
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bb.0:
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liveins: $vgpr0
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; SI-LABEL: name: test_frint_s32
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; SI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
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; SI: $vgpr0 = COPY [[COPY]](s32)
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; CI-LABEL: name: test_frint_s32
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; CI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
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; CI: $vgpr0 = COPY [[COPY]](s32)
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%0:_(s32) = COPY $vgpr0
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%1:_(s32) = G_FRINT %0
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$vgpr0 = COPY %0
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...
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---
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name: test_frint_s64
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; SI-LABEL: name: test_frint_s64
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; SI: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
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; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -9223372036854775808
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; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 4841369599423283200
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; SI: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]]
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; SI: [[OR:%[0-9]+]]:_(s64) = G_OR [[C1]], [[AND]]
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; SI: [[FADD:%[0-9]+]]:_(s64) = G_FADD [[COPY]], [[OR]]
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; SI: [[FNEG:%[0-9]+]]:_(s64) = G_FNEG [[OR]]
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; SI: [[FADD1:%[0-9]+]]:_(s64) = G_FADD [[FADD]], [[FNEG]]
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; SI: [[C2:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x432FFFFFFFFFFFFF
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; SI: [[FABS:%[0-9]+]]:_(s64) = G_FABS [[COPY]]
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; SI: [[FCMP:%[0-9]+]]:_(s1) = G_FCMP floatpred(ogt), [[FABS]](s64), [[C2]]
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; SI: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[FCMP]](s1), [[COPY]], [[FADD1]]
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; SI: $vgpr0_vgpr1 = COPY [[SELECT]](s64)
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; CI-LABEL: name: test_frint_s64
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; CI: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
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; CI: [[FRINT:%[0-9]+]]:_(s64) = G_FRINT [[COPY]]
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; CI: $vgpr0_vgpr1 = COPY [[FRINT]](s64)
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%0:_(s64) = COPY $vgpr0_vgpr1
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%1:_(s64) = G_FRINT %0
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$vgpr0_vgpr1 = COPY %1
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...
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---
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name: test_frint_v2s16
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body: |
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bb.0:
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liveins: $vgpr0
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; SI-LABEL: name: test_frint_v2s16
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; SI: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0
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; SI: $vgpr0 = COPY [[COPY]](<2 x s16>)
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; CI-LABEL: name: test_frint_v2s16
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; CI: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0
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; CI: $vgpr0 = COPY [[COPY]](<2 x s16>)
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%0:_(<2 x s16>) = COPY $vgpr0
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%1:_(<2 x s16>) = G_FRINT %0
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$vgpr0 = COPY %0
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...
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---
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name: test_frint_v2s32
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; SI-LABEL: name: test_frint_v2s32
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; SI: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
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; SI: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
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; SI: [[FRINT:%[0-9]+]]:_(s32) = G_FRINT [[UV]]
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; SI: [[FRINT1:%[0-9]+]]:_(s32) = G_FRINT [[UV1]]
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; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[FRINT]](s32), [[FRINT1]](s32)
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; SI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)
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; CI-LABEL: name: test_frint_v2s32
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; CI: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
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; CI: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
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; CI: [[FRINT:%[0-9]+]]:_(s32) = G_FRINT [[UV]]
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; CI: [[FRINT1:%[0-9]+]]:_(s32) = G_FRINT [[UV1]]
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; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[FRINT]](s32), [[FRINT1]](s32)
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; CI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)
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%0:_(<2 x s32>) = COPY $vgpr0_vgpr1
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%1:_(<2 x s32>) = G_FRINT %0
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$vgpr0_vgpr1 = COPY %1
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...
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---
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name: test_frint_v2s64
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1_vgpr2_vgpr3
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; SI-LABEL: name: test_frint_v2s64
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; SI: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
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; SI: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)
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; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -9223372036854775808
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; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 4841369599423283200
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; SI: [[AND:%[0-9]+]]:_(s64) = G_AND [[UV]], [[C]]
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; SI: [[OR:%[0-9]+]]:_(s64) = G_OR [[C1]], [[AND]]
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; SI: [[FADD:%[0-9]+]]:_(s64) = G_FADD [[UV]], [[OR]]
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; SI: [[FNEG:%[0-9]+]]:_(s64) = G_FNEG [[OR]]
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; SI: [[FADD1:%[0-9]+]]:_(s64) = G_FADD [[FADD]], [[FNEG]]
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; SI: [[C2:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x432FFFFFFFFFFFFF
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; SI: [[FABS:%[0-9]+]]:_(s64) = G_FABS [[UV]]
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; SI: [[FCMP:%[0-9]+]]:_(s1) = G_FCMP floatpred(ogt), [[FABS]](s64), [[C2]]
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; SI: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[FCMP]](s1), [[UV]], [[FADD1]]
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; SI: [[AND1:%[0-9]+]]:_(s64) = G_AND [[UV1]], [[C]]
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; SI: [[OR1:%[0-9]+]]:_(s64) = G_OR [[C1]], [[AND1]]
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; SI: [[FADD2:%[0-9]+]]:_(s64) = G_FADD [[UV1]], [[OR1]]
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; SI: [[FNEG1:%[0-9]+]]:_(s64) = G_FNEG [[OR1]]
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; SI: [[FADD3:%[0-9]+]]:_(s64) = G_FADD [[FADD2]], [[FNEG1]]
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; SI: [[FABS1:%[0-9]+]]:_(s64) = G_FABS [[UV1]]
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; SI: [[FCMP1:%[0-9]+]]:_(s1) = G_FCMP floatpred(ogt), [[FABS1]](s64), [[C2]]
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; SI: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[FCMP1]](s1), [[UV1]], [[FADD3]]
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; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[SELECT]](s64), [[SELECT1]](s64)
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; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>)
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; CI-LABEL: name: test_frint_v2s64
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; CI: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
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; CI: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)
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; CI: [[FRINT:%[0-9]+]]:_(s64) = G_FRINT [[UV]]
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; CI: [[FRINT1:%[0-9]+]]:_(s64) = G_FRINT [[UV1]]
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; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[FRINT]](s64), [[FRINT1]](s64)
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; CI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>)
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%0:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
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%1:_(<2 x s64>) = G_FRINT %0
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$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1
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...
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