96 lines
4.3 KiB
YAML
96 lines
4.3 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -O0 -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -run-pass=legalizer %s -o - | FileCheck %s
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---
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name: test_sext_trunc_v2s32_to_v2s16_to_v2s32
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; CHECK-LABEL: name: test_sext_trunc_v2s32_to_v2s16_to_v2s32
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; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
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; CHECK: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY [[COPY]](<2 x s32>)
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; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<2 x s32>)
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; CHECK: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[UV]], 16
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; CHECK: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG [[UV1]], 16
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; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[SEXT_INREG]](s32), [[SEXT_INREG1]](s32)
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; CHECK: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)
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%0:_(<2 x s32>) = COPY $vgpr0_vgpr1
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%1:_(<2 x s16>) = G_TRUNC %0
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%2:_(<2 x s32>) = G_SEXT %1
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$vgpr0_vgpr1 = COPY %2
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...
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---
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name: test_sext_trunc_v2s32_to_v2s16_to_v2s64
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; CHECK-LABEL: name: test_sext_trunc_v2s32_to_v2s16_to_v2s64
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; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
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; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
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; CHECK: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[UV]](s32)
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; CHECK: [[ANYEXT1:%[0-9]+]]:_(s64) = G_ANYEXT [[UV1]](s32)
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; CHECK: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[ANYEXT]], 16
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; CHECK: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG [[ANYEXT1]], 16
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; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[SEXT_INREG]](s64), [[SEXT_INREG1]](s64)
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; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>)
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%0:_(<2 x s32>) = COPY $vgpr0_vgpr1
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%1:_(<2 x s16>) = G_TRUNC %0
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%2:_(<2 x s64>) = G_SEXT %1
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$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2
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...
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---
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name: test_sext_trunc_v2s32_to_v2s8_to_v2s16
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; The G_SEXT_INREG doesn't lower here because G_TRUNC is both illegal and
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; unable to legalize. This prevents further legalization.
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; CHECK-LABEL: name: test_sext_trunc_v2s32_to_v2s8_to_v2s16
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; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
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; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
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; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[UV]](s32)
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; CHECK: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY1]], 8
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; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[UV1]](s32)
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; CHECK: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY2]], 8
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; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
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; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[SEXT_INREG]](s32)
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; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C]]
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; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[SEXT_INREG1]](s32)
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; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C]]
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; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
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; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C1]](s32)
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; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]]
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; CHECK: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32)
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; CHECK: $vgpr0 = COPY [[BITCAST]](<2 x s16>)
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%0:_(<2 x s32>) = COPY $vgpr0_vgpr1
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%1:_(<2 x s8>) = G_TRUNC %0
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%2:_(<2 x s16>) = G_SEXT %1
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$vgpr0 = COPY %2
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...
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---
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name: test_sext_trunc_v3s32_to_v3s16_to_v3s32
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1_vgpr2
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; CHECK-LABEL: name: test_sext_trunc_v3s32_to_v3s16_to_v3s32
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; CHECK: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2
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; CHECK: [[COPY1:%[0-9]+]]:_(<3 x s32>) = COPY [[COPY]](<3 x s32>)
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; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<3 x s32>)
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; CHECK: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[UV]], 16
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; CHECK: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG [[UV1]], 16
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; CHECK: [[SEXT_INREG2:%[0-9]+]]:_(s32) = G_SEXT_INREG [[UV2]], 16
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; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[SEXT_INREG]](s32), [[SEXT_INREG1]](s32), [[SEXT_INREG2]](s32)
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; CHECK: $vgpr0_vgpr1_vgpr2 = COPY [[BUILD_VECTOR]](<3 x s32>)
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%0:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2
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%1:_(<3 x s16>) = G_TRUNC %0
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%2:_(<3 x s32>) = G_SEXT %1
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$vgpr0_vgpr1_vgpr2 = COPY %2
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...
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