521 lines
22 KiB
C++
521 lines
22 KiB
C++
//===-- llvm/Support/ARMWinEH.h - Windows on ARM EH Constants ---*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_SUPPORT_ARMWINEH_H
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#define LLVM_SUPPORT_ARMWINEH_H
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#include "llvm/ADT/ArrayRef.h"
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#include "llvm/Support/Endian.h"
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namespace llvm {
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namespace ARM {
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namespace WinEH {
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enum class RuntimeFunctionFlag {
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RFF_Unpacked, /// unpacked entry
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RFF_Packed, /// packed entry
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RFF_PackedFragment, /// packed entry representing a fragment
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RFF_Reserved, /// reserved
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};
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enum class ReturnType {
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RT_POP, /// return via pop {pc} (L flag must be set)
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RT_B, /// 16-bit branch
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RT_BW, /// 32-bit branch
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RT_NoEpilogue, /// no epilogue (fragment)
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};
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/// RuntimeFunction - An entry in the table of procedure data (.pdata)
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///
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/// This is ARM specific, but the Function Start RVA, Flag and
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/// ExceptionInformationRVA fields work identically for ARM64.
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///
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/// 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0
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/// 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
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/// +---------------------------------------------------------------+
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/// | Function Start RVA |
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/// +-------------------+-+-+-+-----+-+---+---------------------+---+
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/// | Stack Adjust |C|L|R| Reg |H|Ret| Function Length |Flg|
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/// +-------------------+-+-+-+-----+-+---+---------------------+---+
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///
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/// Flag : 2-bit field with the following meanings:
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/// - 00 = packed unwind data not used; reamining bits point to .xdata record
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/// - 01 = packed unwind data
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/// - 10 = packed unwind data, function assumed to have no prologue; useful
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/// for function fragments that are discontiguous with the start of the
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/// function
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/// - 11 = reserved
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/// Function Length : 11-bit field providing the length of the entire function
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/// in bytes, divided by 2; if the function is greater than
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/// 4KB, a full .xdata record must be used instead
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/// Ret : 2-bit field indicating how the function returns
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/// - 00 = return via pop {pc} (the L bit must be set)
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/// - 01 = return via 16-bit branch
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/// - 10 = return via 32-bit branch
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/// - 11 = no epilogue; useful for function fragments that may only contain a
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/// prologue but the epilogue is elsewhere
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/// H : 1-bit flag indicating whether the function "homes" the integer parameter
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/// registers (r0-r3), allocating 16-bytes on the stack
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/// Reg : 3-bit field indicating the index of the last saved non-volatile
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/// register. If the R bit is set to 0, then only integer registers are
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/// saved (r4-rN, where N is 4 + Reg). If the R bit is set to 1, then
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/// only floating-point registers are being saved (d8-dN, where N is
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/// 8 + Reg). The special case of the R bit being set to 1 and Reg equal
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/// to 7 indicates that no registers are saved.
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/// R : 1-bit flag indicating whether the non-volatile registers are integer or
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/// floating-point. 0 indicates integer, 1 indicates floating-point. The
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/// special case of the R-flag being set and Reg being set to 7 indicates
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/// that no non-volatile registers are saved.
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/// L : 1-bit flag indicating whether the function saves/restores the link
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/// register (LR)
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/// C : 1-bit flag indicating whether the function includes extra instructions
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/// to setup a frame chain for fast walking. If this flag is set, r11 is
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/// implicitly added to the list of saved non-volatile integer registers.
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/// Stack Adjust : 10-bit field indicating the number of bytes of stack that are
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/// allocated for this function. Only values between 0x000 and
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/// 0x3f3 can be directly encoded. If the value is 0x3f4 or
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/// greater, then the low 4 bits have special meaning as follows:
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/// - Bit 0-1
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/// indicate the number of words' of adjustment (1-4), minus 1
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/// - Bit 2
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/// indicates if the prologue combined adjustment into push
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/// - Bit 3
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/// indicates if the epilogue combined adjustment into pop
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///
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/// RESTRICTIONS:
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/// - IF C is SET:
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/// + L flag must be set since frame chaining requires r11 and lr
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/// + r11 must NOT be included in the set of registers described by Reg
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/// - IF Ret is 0:
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/// + L flag must be set
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// NOTE: RuntimeFunction is meant to be a simple class that provides raw access
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// to all fields in the structure. The accessor methods reflect the names of
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// the bitfields that they correspond to. Although some obvious simplifications
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// are possible via merging of methods, it would prevent the use of this class
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// to fully inspect the contents of the data structure which is particularly
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// useful for scenarios such as llvm-readobj to aid in testing.
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class RuntimeFunction {
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public:
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const support::ulittle32_t BeginAddress;
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const support::ulittle32_t UnwindData;
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RuntimeFunction(const support::ulittle32_t *Data)
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: BeginAddress(Data[0]), UnwindData(Data[1]) {}
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RuntimeFunction(const support::ulittle32_t BeginAddress,
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const support::ulittle32_t UnwindData)
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: BeginAddress(BeginAddress), UnwindData(UnwindData) {}
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RuntimeFunctionFlag Flag() const {
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return RuntimeFunctionFlag(UnwindData & 0x3);
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}
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uint32_t ExceptionInformationRVA() const {
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assert(Flag() == RuntimeFunctionFlag::RFF_Unpacked &&
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"unpacked form required for this operation");
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return (UnwindData & ~0x3);
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}
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uint32_t PackedUnwindData() const {
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assert((Flag() == RuntimeFunctionFlag::RFF_Packed ||
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Flag() == RuntimeFunctionFlag::RFF_PackedFragment) &&
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"packed form required for this operation");
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return (UnwindData & ~0x3);
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}
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uint32_t FunctionLength() const {
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assert((Flag() == RuntimeFunctionFlag::RFF_Packed ||
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Flag() == RuntimeFunctionFlag::RFF_PackedFragment) &&
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"packed form required for this operation");
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return (((UnwindData & 0x00001ffc) >> 2) << 1);
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}
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ReturnType Ret() const {
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assert((Flag() == RuntimeFunctionFlag::RFF_Packed ||
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Flag() == RuntimeFunctionFlag::RFF_PackedFragment) &&
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"packed form required for this operation");
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assert(((UnwindData & 0x00006000) || L()) && "L must be set to 1");
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return ReturnType((UnwindData & 0x00006000) >> 13);
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}
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bool H() const {
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assert((Flag() == RuntimeFunctionFlag::RFF_Packed ||
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Flag() == RuntimeFunctionFlag::RFF_PackedFragment) &&
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"packed form required for this operation");
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return ((UnwindData & 0x00008000) >> 15);
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}
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uint8_t Reg() const {
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assert((Flag() == RuntimeFunctionFlag::RFF_Packed ||
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Flag() == RuntimeFunctionFlag::RFF_PackedFragment) &&
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"packed form required for this operation");
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return ((UnwindData & 0x00070000) >> 16);
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}
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bool R() const {
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assert((Flag() == RuntimeFunctionFlag::RFF_Packed ||
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Flag() == RuntimeFunctionFlag::RFF_PackedFragment) &&
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"packed form required for this operation");
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return ((UnwindData & 0x00080000) >> 19);
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}
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bool L() const {
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assert((Flag() == RuntimeFunctionFlag::RFF_Packed ||
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Flag() == RuntimeFunctionFlag::RFF_PackedFragment) &&
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"packed form required for this operation");
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return ((UnwindData & 0x00100000) >> 20);
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}
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bool C() const {
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assert((Flag() == RuntimeFunctionFlag::RFF_Packed ||
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Flag() == RuntimeFunctionFlag::RFF_PackedFragment) &&
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"packed form required for this operation");
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assert(((~UnwindData & 0x00200000) || L()) &&
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"L flag must be set, chaining requires r11 and LR");
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assert(((~UnwindData & 0x00200000) || (Reg() < 7) || R()) &&
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"r11 must not be included in Reg; C implies r11");
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return ((UnwindData & 0x00200000) >> 21);
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}
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uint16_t StackAdjust() const {
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assert((Flag() == RuntimeFunctionFlag::RFF_Packed ||
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Flag() == RuntimeFunctionFlag::RFF_PackedFragment) &&
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"packed form required for this operation");
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return ((UnwindData & 0xffc00000) >> 22);
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}
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};
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/// PrologueFolding - pseudo-flag derived from Stack Adjust indicating that the
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/// prologue has stack adjustment combined into the push
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inline bool PrologueFolding(const RuntimeFunction &RF) {
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return RF.StackAdjust() >= 0x3f4 && (RF.StackAdjust() & 0x4);
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}
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/// Epilogue - pseudo-flag derived from Stack Adjust indicating that the
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/// epilogue has stack adjustment combined into the pop
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inline bool EpilogueFolding(const RuntimeFunction &RF) {
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return RF.StackAdjust() >= 0x3f4 && (RF.StackAdjust() & 0x8);
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}
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/// StackAdjustment - calculated stack adjustment in words. The stack
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/// adjustment should be determined via this function to account for the special
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/// handling the special encoding when the value is >= 0x3f4.
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inline uint16_t StackAdjustment(const RuntimeFunction &RF) {
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uint16_t Adjustment = RF.StackAdjust();
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if (Adjustment >= 0x3f4)
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return (Adjustment & 0x3) ? ((Adjustment & 0x3) << 2) - 1 : 0;
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return Adjustment;
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}
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/// SavedRegisterMask - Utility function to calculate the set of saved general
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/// purpose (r0-r15) and VFP (d0-d31) registers.
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std::pair<uint16_t, uint32_t> SavedRegisterMask(const RuntimeFunction &RF);
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/// RuntimeFunctionARM64 - An entry in the table of procedure data (.pdata)
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///
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/// 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0
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/// 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
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/// +---------------------------------------------------------------+
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/// | Function Start RVA |
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/// +-----------------+---+-+-------+-----+---------------------+---+
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/// | Frame Size |CR |H| RegI |RegF | Function Length |Flg|
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/// +-----------------+---+-+-------+-----+---------------------+---+
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///
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/// See https://docs.microsoft.com/en-us/cpp/build/arm64-exception-handling
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/// for the full reference for this struct.
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class RuntimeFunctionARM64 {
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public:
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const support::ulittle32_t BeginAddress;
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const support::ulittle32_t UnwindData;
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RuntimeFunctionARM64(const support::ulittle32_t *Data)
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: BeginAddress(Data[0]), UnwindData(Data[1]) {}
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RuntimeFunctionARM64(const support::ulittle32_t BeginAddress,
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const support::ulittle32_t UnwindData)
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: BeginAddress(BeginAddress), UnwindData(UnwindData) {}
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RuntimeFunctionFlag Flag() const {
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return RuntimeFunctionFlag(UnwindData & 0x3);
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}
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uint32_t ExceptionInformationRVA() const {
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assert(Flag() == RuntimeFunctionFlag::RFF_Unpacked &&
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"unpacked form required for this operation");
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return (UnwindData & ~0x3);
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}
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uint32_t PackedUnwindData() const {
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assert((Flag() == RuntimeFunctionFlag::RFF_Packed ||
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Flag() == RuntimeFunctionFlag::RFF_PackedFragment) &&
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"packed form required for this operation");
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return (UnwindData & ~0x3);
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}
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uint32_t FunctionLength() const {
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assert((Flag() == RuntimeFunctionFlag::RFF_Packed ||
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Flag() == RuntimeFunctionFlag::RFF_PackedFragment) &&
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"packed form required for this operation");
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return (((UnwindData & 0x00001ffc) >> 2) << 2);
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}
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uint8_t RegF() const {
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assert((Flag() == RuntimeFunctionFlag::RFF_Packed ||
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Flag() == RuntimeFunctionFlag::RFF_PackedFragment) &&
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"packed form required for this operation");
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return ((UnwindData & 0x0000e000) >> 13);
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}
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uint8_t RegI() const {
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assert((Flag() == RuntimeFunctionFlag::RFF_Packed ||
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Flag() == RuntimeFunctionFlag::RFF_PackedFragment) &&
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"packed form required for this operation");
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return ((UnwindData & 0x000f0000) >> 16);
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}
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bool H() const {
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assert((Flag() == RuntimeFunctionFlag::RFF_Packed ||
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Flag() == RuntimeFunctionFlag::RFF_PackedFragment) &&
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"packed form required for this operation");
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return ((UnwindData & 0x00100000) >> 20);
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}
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uint8_t CR() const {
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assert((Flag() == RuntimeFunctionFlag::RFF_Packed ||
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Flag() == RuntimeFunctionFlag::RFF_PackedFragment) &&
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"packed form required for this operation");
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return ((UnwindData & 0x600000) >> 21);
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}
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uint16_t FrameSize() const {
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assert((Flag() == RuntimeFunctionFlag::RFF_Packed ||
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Flag() == RuntimeFunctionFlag::RFF_PackedFragment) &&
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"packed form required for this operation");
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return ((UnwindData & 0xff800000) >> 23);
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}
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};
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/// ExceptionDataRecord - An entry in the table of exception data (.xdata)
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///
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/// The format on ARM is:
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///
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/// 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0
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/// 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
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/// +-------+---------+-+-+-+---+-----------------------------------+
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/// | C Wrd | Epi Cnt |F|E|X|Ver| Function Length |
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/// +-------+--------+'-'-'-'---'---+-------------------------------+
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/// | Reserved |Ex. Code Words| (Extended Epilogue Count) |
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/// +-------+--------+--------------+-------------------------------+
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///
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/// The format on ARM64 is:
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///
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/// 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0
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/// 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
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/// +---------+---------+-+-+---+-----------------------------------+
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/// | C Wrd | Epi Cnt |E|X|Ver| Function Length |
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/// +---------+------+--'-'-'---'---+-------------------------------+
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/// | Reserved |Ex. Code Words| (Extended Epilogue Count) |
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/// +-------+--------+--------------+-------------------------------+
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///
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/// Function Length : 18-bit field indicating the total length of the function
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/// in bytes divided by 2. If a function is larger than
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/// 512KB, then multiple pdata and xdata records must be used.
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/// Vers : 2-bit field describing the version of the remaining structure. Only
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/// version 0 is currently defined (values 1-3 are not permitted).
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/// X : 1-bit field indicating the presence of exception data
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/// E : 1-bit field indicating that the single epilogue is packed into the
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/// header
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/// F : 1-bit field indicating that the record describes a function fragment
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/// (implies that no prologue is present, and prologue processing should be
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/// skipped) (ARM only)
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/// Epilogue Count : 5-bit field that differs in meaning based on the E field.
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///
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/// If E is set, then this field specifies the index of the
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/// first unwind code describing the (only) epilogue.
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///
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/// Otherwise, this field indicates the number of exception
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/// scopes. If more than 31 scopes exist, then this field and
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/// the Code Words field must both be set to 0 to indicate that
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/// an extension word is required.
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/// Code Words : 4-bit (5-bit on ARM64) field that specifies the number of
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/// 32-bit words needed to contain all the unwind codes. If more
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/// than 15 words (31 words on ARM64) are required, then this field
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/// and the Epilogue Count field must both be set to 0 to indicate
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/// that an extension word is required.
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/// Extended Epilogue Count, Extended Code Words :
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/// Valid only if Epilog Count and Code Words are both
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/// set to 0. Provides an 8-bit extended code word
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/// count and 16-bits for epilogue count
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///
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/// The epilogue scope format on ARM is:
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///
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/// 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0
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/// 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
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/// +----------------+------+---+---+-------------------------------+
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/// | Ep Start Idx | Cond |Res| Epilogue Start Offset |
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/// +----------------+------+---+-----------------------------------+
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///
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/// The epilogue scope format on ARM64 is:
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///
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/// 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0
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/// 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
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/// +-------------------+-------+---+-------------------------------+
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/// | Ep Start Idx | Res | Epilogue Start Offset |
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/// +-------------------+-------+-----------------------------------+
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///
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/// If the E bit is unset in the header, the header is followed by a series of
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/// epilogue scopes, which are sorted by their offset.
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///
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/// Epilogue Start Offset: 18-bit field encoding the offset of epilogue relative
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/// to the start of the function in bytes divided by two
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/// Res : 2-bit field reserved for future expansion (must be set to 0)
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/// Condition : (ARM only) 4-bit field providing the condition under which the
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/// epilogue is executed. Unconditional epilogues should set this
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/// field to 0xe. Epilogues must be entirely conditional or
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/// unconditional, and in Thumb-2 mode. The epilogue begins with
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/// the first instruction after the IT opcode.
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/// Epilogue Start Index : 8-bit field indicating the byte index of the first
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/// unwind code describing the epilogue
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///
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/// 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0
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/// 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
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/// +---------------+---------------+---------------+---------------+
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/// | Unwind Code 3 | Unwind Code 2 | Unwind Code 1 | Unwind Code 0 |
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/// +---------------+---------------+---------------+---------------+
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///
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/// Following the epilogue scopes, the byte code describing the unwinding
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/// follows. This is padded to align up to word alignment. Bytes are stored in
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/// little endian.
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///
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/// 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0
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/// 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
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/// +---------------------------------------------------------------+
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/// | Exception Handler RVA (requires X = 1) |
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/// +---------------------------------------------------------------+
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/// | (possibly followed by data required for exception handler) |
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/// +---------------------------------------------------------------+
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///
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/// If the X bit is set in the header, the unwind byte code is followed by the
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/// exception handler information. This constants of one Exception Handler RVA
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/// which is the address to the exception handler, followed immediately by the
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/// variable length data associated with the exception handler.
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///
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struct EpilogueScope {
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const support::ulittle32_t ES;
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EpilogueScope(const support::ulittle32_t Data) : ES(Data) {}
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// Same for both ARM and AArch64.
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uint32_t EpilogueStartOffset() const {
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return (ES & 0x0003ffff);
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}
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// Different implementations for ARM and AArch64.
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uint8_t ResARM() const {
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return ((ES & 0x000c0000) >> 18);
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}
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uint8_t ResAArch64() const {
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return ((ES & 0x000f0000) >> 18);
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}
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// Condition is only applicable to ARM.
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uint8_t Condition() const {
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return ((ES & 0x00f00000) >> 20);
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}
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// Different implementations for ARM and AArch64.
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uint8_t EpilogueStartIndexARM() const {
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return ((ES & 0xff000000) >> 24);
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}
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uint16_t EpilogueStartIndexAArch64() const {
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return ((ES & 0xffc00000) >> 22);
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}
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};
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struct ExceptionDataRecord;
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inline size_t HeaderWords(const ExceptionDataRecord &XR);
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struct ExceptionDataRecord {
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const support::ulittle32_t *Data;
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bool isAArch64;
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ExceptionDataRecord(const support::ulittle32_t *Data, bool isAArch64) :
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Data(Data), isAArch64(isAArch64) {}
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uint32_t FunctionLength() const {
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return (Data[0] & 0x0003ffff);
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}
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uint32_t FunctionLengthInBytesARM() const {
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return FunctionLength() << 1;
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}
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uint32_t FunctionLengthInBytesAArch64() const {
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return FunctionLength() << 2;
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}
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uint8_t Vers() const {
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return (Data[0] & 0x000C0000) >> 18;
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}
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bool X() const {
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return ((Data[0] & 0x00100000) >> 20);
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}
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bool E() const {
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return ((Data[0] & 0x00200000) >> 21);
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}
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bool F() const {
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assert(!isAArch64 && "Fragments are only supported on ARMv7 WinEH");
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return ((Data[0] & 0x00400000) >> 22);
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}
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uint16_t EpilogueCount() const {
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if (HeaderWords(*this) == 1) {
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if (isAArch64)
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return (Data[0] & 0x07C00000) >> 22;
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return (Data[0] & 0x0f800000) >> 23;
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}
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return Data[1] & 0x0000ffff;
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}
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uint8_t CodeWords() const {
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if (HeaderWords(*this) == 1) {
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if (isAArch64)
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return (Data[0] & 0xf8000000) >> 27;
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return (Data[0] & 0xf0000000) >> 28;
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}
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return (Data[1] & 0x00ff0000) >> 16;
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}
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ArrayRef<support::ulittle32_t> EpilogueScopes() const {
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assert(E() == 0 && "epilogue scopes are only present when the E bit is 0");
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size_t Offset = HeaderWords(*this);
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return makeArrayRef(&Data[Offset], EpilogueCount());
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}
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ArrayRef<uint8_t> UnwindByteCode() const {
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const size_t Offset = HeaderWords(*this)
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+ (E() ? 0 : EpilogueCount());
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const uint8_t *ByteCode =
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reinterpret_cast<const uint8_t *>(&Data[Offset]);
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return makeArrayRef(ByteCode, CodeWords() * sizeof(uint32_t));
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}
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uint32_t ExceptionHandlerRVA() const {
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assert(X() && "Exception Handler RVA is only valid if the X bit is set");
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return Data[HeaderWords(*this) + (E() ? 0 : EpilogueCount()) + CodeWords()];
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}
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uint32_t ExceptionHandlerParameter() const {
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assert(X() && "Exception Handler RVA is only valid if the X bit is set");
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return Data[HeaderWords(*this) + (E() ? 0 : EpilogueCount()) + CodeWords() +
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1];
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}
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};
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inline size_t HeaderWords(const ExceptionDataRecord &XR) {
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if (XR.isAArch64)
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return (XR.Data[0] & 0xffc00000) ? 1 : 2;
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return (XR.Data[0] & 0xff800000) ? 1 : 2;
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}
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}
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}
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}
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#endif
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