233 lines
12 KiB
C
233 lines
12 KiB
C
// REQUIRES: aarch64-registered-target
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// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
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// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
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// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null 2>%t
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// RUN: FileCheck --check-prefix=ASM --allow-empty %s <%t
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// If this check fails please read test/CodeGen/aarch64-sve-intrinsics/README for instructions on how to resolve it.
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// ASM-NOT: warning
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#include <arm_sve.h>
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#ifdef SVE_OVERLOADED_FORMS
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// A simple used,unused... macro, long enough to represent any SVE builtin.
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#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
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#else
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#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
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#endif
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svint8_t test_svldnf1_s8(svbool_t pg, const int8_t *base)
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{
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// CHECK-LABEL: test_svldnf1_s8
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// CHECK: %[[LOAD:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.ldnf1.nxv16i8(<vscale x 16 x i1> %pg, i8* %base)
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// CHECK: ret <vscale x 16 x i8> %[[LOAD]]
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return SVE_ACLE_FUNC(svldnf1,_s8,,)(pg, base);
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}
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svint16_t test_svldnf1_s16(svbool_t pg, const int16_t *base)
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{
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// CHECK-LABEL: test_svldnf1_s16
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// CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
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// CHECK: %[[LOAD:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.ldnf1.nxv8i16(<vscale x 8 x i1> %[[PG]], i16* %base)
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// CHECK: ret <vscale x 8 x i16> %[[LOAD]]
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return SVE_ACLE_FUNC(svldnf1,_s16,,)(pg, base);
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}
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svint32_t test_svldnf1_s32(svbool_t pg, const int32_t *base)
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{
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// CHECK-LABEL: test_svldnf1_s32
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// CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
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// CHECK: %[[LOAD:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.ldnf1.nxv4i32(<vscale x 4 x i1> %[[PG]], i32* %base)
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// CHECK: ret <vscale x 4 x i32> %[[LOAD]]
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return SVE_ACLE_FUNC(svldnf1,_s32,,)(pg, base);
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}
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svint64_t test_svldnf1_s64(svbool_t pg, const int64_t *base)
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{
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// CHECK-LABEL: test_svldnf1_s64
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// CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
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// CHECK: %[[LOAD:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.ldnf1.nxv2i64(<vscale x 2 x i1> %[[PG]], i64* %base)
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// CHECK: ret <vscale x 2 x i64> %[[LOAD]]
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return SVE_ACLE_FUNC(svldnf1,_s64,,)(pg, base);
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}
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svuint8_t test_svldnf1_u8(svbool_t pg, const uint8_t *base)
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{
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// CHECK-LABEL: test_svldnf1_u8
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// CHECK: %[[LOAD:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.ldnf1.nxv16i8(<vscale x 16 x i1> %pg, i8* %base)
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// CHECK: ret <vscale x 16 x i8> %[[LOAD]]
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return SVE_ACLE_FUNC(svldnf1,_u8,,)(pg, base);
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}
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svuint16_t test_svldnf1_u16(svbool_t pg, const uint16_t *base)
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{
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// CHECK-LABEL: test_svldnf1_u16
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// CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
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// CHECK: %[[LOAD:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.ldnf1.nxv8i16(<vscale x 8 x i1> %[[PG]], i16* %base)
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// CHECK: ret <vscale x 8 x i16> %[[LOAD]]
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return SVE_ACLE_FUNC(svldnf1,_u16,,)(pg, base);
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}
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svuint32_t test_svldnf1_u32(svbool_t pg, const uint32_t *base)
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{
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// CHECK-LABEL: test_svldnf1_u32
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// CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
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// CHECK: %[[LOAD:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.ldnf1.nxv4i32(<vscale x 4 x i1> %[[PG]], i32* %base)
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// CHECK: ret <vscale x 4 x i32> %[[LOAD]]
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return SVE_ACLE_FUNC(svldnf1,_u32,,)(pg, base);
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}
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svuint64_t test_svldnf1_u64(svbool_t pg, const uint64_t *base)
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{
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// CHECK-LABEL: test_svldnf1_u64
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// CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
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// CHECK: %[[LOAD:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.ldnf1.nxv2i64(<vscale x 2 x i1> %[[PG]], i64* %base)
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// CHECK: ret <vscale x 2 x i64> %[[LOAD]]
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return SVE_ACLE_FUNC(svldnf1,_u64,,)(pg, base);
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}
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svfloat16_t test_svldnf1_f16(svbool_t pg, const float16_t *base)
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{
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// CHECK-LABEL: test_svldnf1_f16
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// CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
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// CHECK: %[[LOAD:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.ldnf1.nxv8f16(<vscale x 8 x i1> %[[PG]], half* %base)
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// CHECK: ret <vscale x 8 x half> %[[LOAD]]
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return SVE_ACLE_FUNC(svldnf1,_f16,,)(pg, base);
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}
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svfloat32_t test_svldnf1_f32(svbool_t pg, const float32_t *base)
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{
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// CHECK-LABEL: test_svldnf1_f32
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// CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
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// CHECK: %[[LOAD:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.ldnf1.nxv4f32(<vscale x 4 x i1> %[[PG]], float* %base)
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// CHECK: ret <vscale x 4 x float> %[[LOAD]]
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return SVE_ACLE_FUNC(svldnf1,_f32,,)(pg, base);
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}
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svfloat64_t test_svldnf1_f64(svbool_t pg, const float64_t *base)
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{
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// CHECK-LABEL: test_svldnf1_f64
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// CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
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// CHECK: %[[LOAD:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.ldnf1.nxv2f64(<vscale x 2 x i1> %[[PG]], double* %base)
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// CHECK: ret <vscale x 2 x double> %[[LOAD]]
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return SVE_ACLE_FUNC(svldnf1,_f64,,)(pg, base);
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}
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svint8_t test_svldnf1_vnum_s8(svbool_t pg, const int8_t *base, int64_t vnum)
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{
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// CHECK-LABEL: test_svldnf1_vnum_s8
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// CHECK: %[[BITCAST:.*]] = bitcast i8* %base to <vscale x 16 x i8>*
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// CHECK: %[[GEP:.*]] = getelementptr <vscale x 16 x i8>, <vscale x 16 x i8>* %[[BITCAST]], i64 %vnum, i64 0
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// CHECK: %[[LOAD:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.ldnf1.nxv16i8(<vscale x 16 x i1> %pg, i8* %[[GEP]])
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// CHECK: ret <vscale x 16 x i8> %[[LOAD]]
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return SVE_ACLE_FUNC(svldnf1_vnum,_s8,,)(pg, base, vnum);
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}
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svint16_t test_svldnf1_vnum_s16(svbool_t pg, const int16_t *base, int64_t vnum)
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{
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// CHECK-LABEL: test_svldnf1_vnum_s16
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// CHECK-DAG: %[[BITCAST:.*]] = bitcast i16* %base to <vscale x 8 x i16>*
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// CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 8 x i16>, <vscale x 8 x i16>* %[[BITCAST]], i64 %vnum, i64 0
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// CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
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// CHECK: %[[LOAD:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.ldnf1.nxv8i16(<vscale x 8 x i1> %[[PG]], i16* %[[GEP]])
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// CHECK: ret <vscale x 8 x i16> %[[LOAD]]
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return SVE_ACLE_FUNC(svldnf1_vnum,_s16,,)(pg, base, vnum);
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}
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svint32_t test_svldnf1_vnum_s32(svbool_t pg, const int32_t *base, int64_t vnum)
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{
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// CHECK-LABEL: test_svldnf1_vnum_s32
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// CHECK-DAG: %[[BITCAST:.*]] = bitcast i32* %base to <vscale x 4 x i32>*
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// CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* %[[BITCAST]], i64 %vnum, i64 0
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// CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
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// CHECK: %[[LOAD:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.ldnf1.nxv4i32(<vscale x 4 x i1> %[[PG]], i32* %[[GEP]])
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// CHECK: ret <vscale x 4 x i32> %[[LOAD]]
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return SVE_ACLE_FUNC(svldnf1_vnum,_s32,,)(pg, base, vnum);
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}
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svint64_t test_svldnf1_vnum_s64(svbool_t pg, const int64_t *base, int64_t vnum)
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{
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// CHECK-LABEL: test_svldnf1_vnum_s64
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// CHECK-DAG: %[[BITCAST:.*]] = bitcast i64* %base to <vscale x 2 x i64>*
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// CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 2 x i64>, <vscale x 2 x i64>* %[[BITCAST]], i64 %vnum, i64 0
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// CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
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// CHECK: %[[LOAD:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.ldnf1.nxv2i64(<vscale x 2 x i1> %[[PG]], i64* %[[GEP]])
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// CHECK: ret <vscale x 2 x i64> %[[LOAD]]
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return SVE_ACLE_FUNC(svldnf1_vnum,_s64,,)(pg, base, vnum);
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}
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svuint8_t test_svldnf1_vnum_u8(svbool_t pg, const uint8_t *base, int64_t vnum)
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{
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// CHECK-LABEL: test_svldnf1_vnum_u8
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// CHECK: %[[BITCAST:.*]] = bitcast i8* %base to <vscale x 16 x i8>*
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// CHECK: %[[GEP:.*]] = getelementptr <vscale x 16 x i8>, <vscale x 16 x i8>* %[[BITCAST]], i64 %vnum, i64 0
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// CHECK: %[[LOAD:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.ldnf1.nxv16i8(<vscale x 16 x i1> %pg, i8* %[[GEP]])
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// CHECK: ret <vscale x 16 x i8> %[[LOAD]]
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return SVE_ACLE_FUNC(svldnf1_vnum,_u8,,)(pg, base, vnum);
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}
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svuint16_t test_svldnf1_vnum_u16(svbool_t pg, const uint16_t *base, int64_t vnum)
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{
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// CHECK-LABEL: test_svldnf1_vnum_u16
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// CHECK-DAG: %[[BITCAST:.*]] = bitcast i16* %base to <vscale x 8 x i16>*
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// CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 8 x i16>, <vscale x 8 x i16>* %[[BITCAST]], i64 %vnum, i64 0
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// CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
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// CHECK: %[[LOAD:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.ldnf1.nxv8i16(<vscale x 8 x i1> %[[PG]], i16* %[[GEP]])
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// CHECK: ret <vscale x 8 x i16> %[[LOAD]]
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return SVE_ACLE_FUNC(svldnf1_vnum,_u16,,)(pg, base, vnum);
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}
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svuint32_t test_svldnf1_vnum_u32(svbool_t pg, const uint32_t *base, int64_t vnum)
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{
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// CHECK-LABEL: test_svldnf1_vnum_u32
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// CHECK-DAG: %[[BITCAST:.*]] = bitcast i32* %base to <vscale x 4 x i32>*
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// CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* %[[BITCAST]], i64 %vnum, i64 0
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// CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
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// CHECK: %[[LOAD:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.ldnf1.nxv4i32(<vscale x 4 x i1> %[[PG]], i32* %[[GEP]])
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// CHECK: ret <vscale x 4 x i32> %[[LOAD]]
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return SVE_ACLE_FUNC(svldnf1_vnum,_u32,,)(pg, base, vnum);
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}
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svuint64_t test_svldnf1_vnum_u64(svbool_t pg, const uint64_t *base, int64_t vnum)
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{
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// CHECK-LABEL: test_svldnf1_vnum_u64
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// CHECK-DAG: %[[BITCAST:.*]] = bitcast i64* %base to <vscale x 2 x i64>*
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// CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 2 x i64>, <vscale x 2 x i64>* %[[BITCAST]], i64 %vnum, i64 0
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// CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
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// CHECK: %[[LOAD:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.ldnf1.nxv2i64(<vscale x 2 x i1> %[[PG]], i64* %[[GEP]])
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// CHECK: ret <vscale x 2 x i64> %[[LOAD]]
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return SVE_ACLE_FUNC(svldnf1_vnum,_u64,,)(pg, base, vnum);
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}
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svfloat16_t test_svldnf1_vnum_f16(svbool_t pg, const float16_t *base, int64_t vnum)
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{
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// CHECK-LABEL: test_svldnf1_vnum_f16
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// CHECK-DAG: %[[BITCAST:.*]] = bitcast half* %base to <vscale x 8 x half>*
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// CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 8 x half>, <vscale x 8 x half>* %[[BITCAST]], i64 %vnum, i64 0
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// CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
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// CHECK: %[[LOAD:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.ldnf1.nxv8f16(<vscale x 8 x i1> %[[PG]], half* %[[GEP]])
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// CHECK: ret <vscale x 8 x half> %[[LOAD]]
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return SVE_ACLE_FUNC(svldnf1_vnum,_f16,,)(pg, base, vnum);
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}
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svfloat32_t test_svldnf1_vnum_f32(svbool_t pg, const float32_t *base, int64_t vnum)
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{
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// CHECK-LABEL: test_svldnf1_vnum_f32
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// CHECK-DAG: %[[BITCAST:.*]] = bitcast float* %base to <vscale x 4 x float>*
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// CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 4 x float>, <vscale x 4 x float>* %[[BITCAST]], i64 %vnum, i64 0
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// CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
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// CHECK: %[[LOAD:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.ldnf1.nxv4f32(<vscale x 4 x i1> %[[PG]], float* %[[GEP]])
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// CHECK: ret <vscale x 4 x float> %[[LOAD]]
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return SVE_ACLE_FUNC(svldnf1_vnum,_f32,,)(pg, base, vnum);
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}
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svfloat64_t test_svldnf1_vnum_f64(svbool_t pg, const float64_t *base, int64_t vnum)
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{
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// CHECK-LABEL: test_svldnf1_vnum_f64
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// CHECK-DAG: %[[BITCAST:.*]] = bitcast double* %base to <vscale x 2 x double>*
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// CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 2 x double>, <vscale x 2 x double>* %[[BITCAST]], i64 %vnum, i64 0
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// CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
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// CHECK: %[[LOAD:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.ldnf1.nxv2f64(<vscale x 2 x i1> %[[PG]], double* %[[GEP]])
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// CHECK: ret <vscale x 2 x double> %[[LOAD]]
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return SVE_ACLE_FUNC(svldnf1_vnum,_f64,,)(pg, base, vnum);
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}
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