161 lines
5.1 KiB
ArmAsm
161 lines
5.1 KiB
ArmAsm
# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
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# Verify that we create proper JSON for the MCA views TimelineView, ResourcePressureview,
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# InstructionInfoView and SummaryView.
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# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=haswell --json --timeline-max-iterations=1 --timeline < %s | FileCheck %s
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add %eax, %eax
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add %ebx, %ebx
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add %ecx, %ecx
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add %edx, %edx
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# CHECK: {
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# CHECK-NEXT: "Instructions": [
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# CHECK-NEXT: "addl\t%eax, %eax",
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# CHECK-NEXT: "addl\t%ebx, %ebx",
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# CHECK-NEXT: "addl\t%ecx, %ecx",
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# CHECK-NEXT: "addl\t%edx, %edx"
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# CHECK-NEXT: ],
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# CHECK-NEXT: "Resources": {
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# CHECK-NEXT: "CPUName": "haswell",
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# CHECK-NEXT: "Resources": [
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# CHECK-NEXT: "HWDivider",
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# CHECK-NEXT: "HWFPDivider",
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# CHECK-NEXT: "HWPort0",
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# CHECK-NEXT: "HWPort1",
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# CHECK-NEXT: "HWPort2",
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# CHECK-NEXT: "HWPort3",
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# CHECK-NEXT: "HWPort4",
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# CHECK-NEXT: "HWPort5",
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# CHECK-NEXT: "HWPort6",
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# CHECK-NEXT: "HWPort7"
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# CHECK-NEXT: ]
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# CHECK-NEXT: }
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# CHECK-NEXT: }
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# CHECK-NEXT: {
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# CHECK-NEXT: "SummaryView": {
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# CHECK-NEXT: "BlockRThroughput": 1,
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# CHECK-NEXT: "DispatchWidth": 4,
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# CHECK-NEXT: "IPC": 3.883495145631068,
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# CHECK-NEXT: "Instructions": 400,
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# CHECK-NEXT: "Iterations": 100,
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# CHECK-NEXT: "TotalCycles": 103,
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# CHECK-NEXT: "TotaluOps": 400,
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# CHECK-NEXT: "uOpsPerCycle": 3.883495145631068
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# CHECK-NEXT: }
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# CHECK-NEXT: }
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# CHECK-NEXT: [
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# CHECK-NEXT: {
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# CHECK-NEXT: "Instruction": 0,
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# CHECK-NEXT: "Latency": 1,
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# CHECK-NEXT: "NumMicroOpcodes": 1,
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# CHECK-NEXT: "RThroughput": 0.25,
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# CHECK-NEXT: "hasUnmodeledSideEffects": false,
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# CHECK-NEXT: "mayLoad": false,
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# CHECK-NEXT: "mayStore": false
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "Instruction": 1,
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# CHECK-NEXT: "Latency": 1,
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# CHECK-NEXT: "NumMicroOpcodes": 1,
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# CHECK-NEXT: "RThroughput": 0.25,
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# CHECK-NEXT: "hasUnmodeledSideEffects": false,
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# CHECK-NEXT: "mayLoad": false,
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# CHECK-NEXT: "mayStore": false
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "Instruction": 2,
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# CHECK-NEXT: "Latency": 1,
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# CHECK-NEXT: "NumMicroOpcodes": 1,
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# CHECK-NEXT: "RThroughput": 0.25,
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# CHECK-NEXT: "hasUnmodeledSideEffects": false,
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# CHECK-NEXT: "mayLoad": false,
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# CHECK-NEXT: "mayStore": false
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "Instruction": 3,
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# CHECK-NEXT: "Latency": 1,
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# CHECK-NEXT: "NumMicroOpcodes": 1,
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# CHECK-NEXT: "RThroughput": 0.25,
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# CHECK-NEXT: "hasUnmodeledSideEffects": false,
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# CHECK-NEXT: "mayLoad": false,
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# CHECK-NEXT: "mayStore": false
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# CHECK-NEXT: }
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# CHECK-NEXT: ]
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# CHECK-NEXT: {
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# CHECK-NEXT: "ResourcePressureInfo": [
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# CHECK-NEXT: {
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# CHECK-NEXT: "InstructionIndex": 0,
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# CHECK-NEXT: "ResourceIndex": 8,
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# CHECK-NEXT: "ResourceUsage": 1
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "InstructionIndex": 1,
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# CHECK-NEXT: "ResourceIndex": 7,
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# CHECK-NEXT: "ResourceUsage": 1
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "InstructionIndex": 2,
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# CHECK-NEXT: "ResourceIndex": 3,
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# CHECK-NEXT: "ResourceUsage": 1
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "InstructionIndex": 3,
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# CHECK-NEXT: "ResourceIndex": 2,
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# CHECK-NEXT: "ResourceUsage": 1
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "InstructionIndex": 4,
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# CHECK-NEXT: "ResourceIndex": 2,
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# CHECK-NEXT: "ResourceUsage": 1
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "InstructionIndex": 4,
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# CHECK-NEXT: "ResourceIndex": 3,
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# CHECK-NEXT: "ResourceUsage": 1
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "InstructionIndex": 4,
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# CHECK-NEXT: "ResourceIndex": 7,
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# CHECK-NEXT: "ResourceUsage": 1
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "InstructionIndex": 4,
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# CHECK-NEXT: "ResourceIndex": 8,
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# CHECK-NEXT: "ResourceUsage": 1
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# CHECK-NEXT: }
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# CHECK-NEXT: ]
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# CHECK-NEXT: }
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# CHECK-NEXT: {
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# CHECK-NEXT: "TimelineInfo": [
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# CHECK-NEXT: {
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# CHECK-NEXT: "CycleDispatched": 0,
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# CHECK-NEXT: "CycleExecuted": 2,
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# CHECK-NEXT: "CycleIssued": 1,
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# CHECK-NEXT: "CycleReady": 0,
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# CHECK-NEXT: "CycleRetired": 3
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "CycleDispatched": 0,
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# CHECK-NEXT: "CycleExecuted": 2,
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# CHECK-NEXT: "CycleIssued": 1,
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# CHECK-NEXT: "CycleReady": 0,
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# CHECK-NEXT: "CycleRetired": 3
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "CycleDispatched": 0,
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# CHECK-NEXT: "CycleExecuted": 2,
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# CHECK-NEXT: "CycleIssued": 1,
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# CHECK-NEXT: "CycleReady": 0,
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# CHECK-NEXT: "CycleRetired": 3
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "CycleDispatched": 0,
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# CHECK-NEXT: "CycleExecuted": 2,
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# CHECK-NEXT: "CycleIssued": 1,
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# CHECK-NEXT: "CycleReady": 0,
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# CHECK-NEXT: "CycleRetired": 3
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# CHECK-NEXT: }
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# CHECK-NEXT: ]
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# CHECK-NEXT: }
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