143 lines
7.3 KiB
LLVM
143 lines
7.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -instcombine -mtriple aarch64-linux-gnu -mattr=+sve -S < %s 2>%t | FileCheck %s
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; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t
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; If this check fails please read test/CodeGen/AArch64/README for instructions on how to resolve it.
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; WARN-NOT: warning
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define void @fixed_array16i32_to_scalable4i32(<vscale x 4 x i32>* %out) {
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; CHECK-LABEL: @fixed_array16i32_to_scalable4i32(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP:%.*]] = alloca [16 x i32], align 16
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; CHECK-NEXT: [[CAST:%.*]] = bitcast [16 x i32]* [[TMP]] to <vscale x 4 x i32>*
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; CHECK-NEXT: store volatile <vscale x 4 x i32> zeroinitializer, <vscale x 4 x i32>* [[CAST]], align 16
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; CHECK-NEXT: [[RELOAD:%.*]] = load volatile <vscale x 4 x i32>, <vscale x 4 x i32>* [[CAST]], align 16
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; CHECK-NEXT: store <vscale x 4 x i32> [[RELOAD]], <vscale x 4 x i32>* [[OUT:%.*]], align 16
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; CHECK-NEXT: ret void
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;
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entry:
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%tmp = alloca [16 x i32], align 16
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%cast = bitcast [16 x i32]* %tmp to <vscale x 4 x i32>*
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store volatile <vscale x 4 x i32> zeroinitializer, <vscale x 4 x i32>* %cast, align 16
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%reload = load volatile <vscale x 4 x i32>, <vscale x 4 x i32>* %cast, align 16
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store <vscale x 4 x i32> %reload, <vscale x 4 x i32>* %out, align 16
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ret void
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}
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define void @scalable4i32_to_fixed16i32(<16 x i32>* %out) {
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; CHECK-LABEL: @scalable4i32_to_fixed16i32(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP:%.*]] = alloca <vscale x 4 x i32>, align 64
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; CHECK-NEXT: [[CAST:%.*]] = bitcast <vscale x 4 x i32>* [[TMP]] to <16 x i32>*
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; CHECK-NEXT: store <16 x i32> zeroinitializer, <16 x i32>* [[CAST]], align 64
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; CHECK-NEXT: [[RELOAD:%.*]] = load volatile <16 x i32>, <16 x i32>* [[CAST]], align 64
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; CHECK-NEXT: store <16 x i32> [[RELOAD]], <16 x i32>* [[OUT:%.*]], align 16
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; CHECK-NEXT: ret void
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;
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entry:
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%tmp = alloca <vscale x 4 x i32>, align 16
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%cast = bitcast <vscale x 4 x i32>* %tmp to <16 x i32>*
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store <16 x i32> zeroinitializer, <16 x i32>* %cast, align 16
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%reload = load volatile <16 x i32>, <16 x i32>* %cast, align 16
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store <16 x i32> %reload, <16 x i32>* %out, align 16
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ret void
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}
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define void @fixed16i32_to_scalable4i32(<vscale x 4 x i32>* %out) {
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; CHECK-LABEL: @fixed16i32_to_scalable4i32(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP:%.*]] = alloca <16 x i32>, align 16
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; CHECK-NEXT: [[CAST:%.*]] = bitcast <16 x i32>* [[TMP]] to <vscale x 4 x i32>*
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; CHECK-NEXT: store volatile <vscale x 4 x i32> zeroinitializer, <vscale x 4 x i32>* [[CAST]], align 16
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; CHECK-NEXT: [[RELOAD:%.*]] = load volatile <vscale x 4 x i32>, <vscale x 4 x i32>* [[CAST]], align 16
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; CHECK-NEXT: store <vscale x 4 x i32> [[RELOAD]], <vscale x 4 x i32>* [[OUT:%.*]], align 16
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; CHECK-NEXT: ret void
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;
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entry:
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%tmp = alloca <16 x i32>, align 16
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%cast = bitcast <16 x i32>* %tmp to <vscale x 4 x i32>*
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store volatile <vscale x 4 x i32> zeroinitializer, <vscale x 4 x i32>* %cast, align 16
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%reload = load volatile <vscale x 4 x i32>, <vscale x 4 x i32>* %cast, align 16
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store <vscale x 4 x i32> %reload, <vscale x 4 x i32>* %out, align 16
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ret void
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}
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define void @scalable16i32_to_fixed16i32(<16 x i32>* %out) {
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; CHECK-LABEL: @scalable16i32_to_fixed16i32(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP:%.*]] = alloca <vscale x 16 x i32>, align 64
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; CHECK-NEXT: [[CAST:%.*]] = bitcast <vscale x 16 x i32>* [[TMP]] to <16 x i32>*
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; CHECK-NEXT: store volatile <16 x i32> zeroinitializer, <16 x i32>* [[CAST]], align 64
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; CHECK-NEXT: [[RELOAD:%.*]] = load volatile <16 x i32>, <16 x i32>* [[CAST]], align 64
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; CHECK-NEXT: store <16 x i32> [[RELOAD]], <16 x i32>* [[OUT:%.*]], align 16
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; CHECK-NEXT: ret void
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;
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entry:
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%tmp = alloca <vscale x 16 x i32>, align 16
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%cast = bitcast <vscale x 16 x i32>* %tmp to <16 x i32>*
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store volatile <16 x i32> zeroinitializer, <16 x i32>* %cast, align 16
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%reload = load volatile <16 x i32>, <16 x i32>* %cast, align 16
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store <16 x i32> %reload, <16 x i32>* %out, align 16
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ret void
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}
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define void @scalable32i32_to_scalable16i32(<vscale x 16 x i32>* %out) {
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; CHECK-LABEL: @scalable32i32_to_scalable16i32(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP:%.*]] = alloca <vscale x 32 x i32>, align 64
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; CHECK-NEXT: [[CAST:%.*]] = bitcast <vscale x 32 x i32>* [[TMP]] to <vscale x 16 x i32>*
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; CHECK-NEXT: store volatile <vscale x 16 x i32> zeroinitializer, <vscale x 16 x i32>* [[CAST]], align 64
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; CHECK-NEXT: [[RELOAD:%.*]] = load volatile <vscale x 16 x i32>, <vscale x 16 x i32>* [[CAST]], align 64
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; CHECK-NEXT: store <vscale x 16 x i32> [[RELOAD]], <vscale x 16 x i32>* [[OUT:%.*]], align 16
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; CHECK-NEXT: ret void
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;
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entry:
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%tmp = alloca <vscale x 32 x i32>, align 16
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%cast = bitcast <vscale x 32 x i32>* %tmp to <vscale x 16 x i32>*
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store volatile <vscale x 16 x i32> zeroinitializer, <vscale x 16 x i32>* %cast, align 16
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%reload = load volatile <vscale x 16 x i32>, <vscale x 16 x i32>* %cast, align 16
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store <vscale x 16 x i32> %reload, <vscale x 16 x i32>* %out, align 16
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ret void
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}
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define void @scalable32i16_to_scalable16i32(<vscale x 16 x i32>* %out) {
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; CHECK-LABEL: @scalable32i16_to_scalable16i32(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP:%.*]] = alloca <vscale x 16 x i32>, align 64
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; CHECK-NEXT: store volatile <vscale x 16 x i32> zeroinitializer, <vscale x 16 x i32>* [[TMP]], align 64
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; CHECK-NEXT: [[RELOAD:%.*]] = load volatile <vscale x 16 x i32>, <vscale x 16 x i32>* [[TMP]], align 64
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; CHECK-NEXT: store <vscale x 16 x i32> [[RELOAD]], <vscale x 16 x i32>* [[OUT:%.*]], align 16
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; CHECK-NEXT: ret void
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;
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entry:
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%tmp = alloca <vscale x 32 x i16>, align 16
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%cast = bitcast <vscale x 32 x i16>* %tmp to <vscale x 16 x i32>*
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store volatile <vscale x 16 x i32> zeroinitializer, <vscale x 16 x i32>* %cast, align 16
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%reload = load volatile <vscale x 16 x i32>, <vscale x 16 x i32>* %cast, align 16
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store <vscale x 16 x i32> %reload, <vscale x 16 x i32>* %out, align 16
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ret void
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}
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define void @scalable32i16_to_scalable16i32_multiuse(<vscale x 16 x i32>* %out, <vscale x 32 x i16>* %out2) {
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; CHECK-LABEL: @scalable32i16_to_scalable16i32_multiuse(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP:%.*]] = alloca <vscale x 32 x i16>, align 64
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; CHECK-NEXT: [[CAST:%.*]] = bitcast <vscale x 32 x i16>* [[TMP]] to <vscale x 16 x i32>*
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; CHECK-NEXT: store volatile <vscale x 16 x i32> zeroinitializer, <vscale x 16 x i32>* [[CAST]], align 64
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; CHECK-NEXT: [[RELOAD:%.*]] = load volatile <vscale x 16 x i32>, <vscale x 16 x i32>* [[CAST]], align 64
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; CHECK-NEXT: store <vscale x 16 x i32> [[RELOAD]], <vscale x 16 x i32>* [[OUT:%.*]], align 16
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; CHECK-NEXT: [[RELOAD2:%.*]] = load volatile <vscale x 32 x i16>, <vscale x 32 x i16>* [[TMP]], align 64
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; CHECK-NEXT: store <vscale x 32 x i16> [[RELOAD2]], <vscale x 32 x i16>* [[OUT2:%.*]], align 16
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; CHECK-NEXT: ret void
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;
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entry:
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%tmp = alloca <vscale x 32 x i16>, align 16
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%cast = bitcast <vscale x 32 x i16>* %tmp to <vscale x 16 x i32>*
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store volatile <vscale x 16 x i32> zeroinitializer, <vscale x 16 x i32>* %cast, align 16
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%reload = load volatile <vscale x 16 x i32>, <vscale x 16 x i32>* %cast, align 16
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store <vscale x 16 x i32> %reload, <vscale x 16 x i32>* %out, align 16
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%reload2 = load volatile <vscale x 32 x i16>, <vscale x 32 x i16>* %tmp, align 16
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store <vscale x 32 x i16> %reload2, <vscale x 32 x i16>* %out2, align 16
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ret void
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}
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