41 lines
3.2 KiB
ArmAsm
41 lines
3.2 KiB
ArmAsm
# RUN: llvm-mc -triple mips-unknown-linux-gnu -mcpu=mips32r3 \
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# RUN: -mattr=+micromips,+fp64 -show-encoding -show-inst %s \
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# RUN: | FileCheck %s
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abs.d $f0, $f12 # CHECK: abs.d $f0, $f12 # encoding: [0x54,0x0c,0x23,0x7b]
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# CHECK-NEXT: # <MCInst #{{[0-9]+}} FABS_D64_MM
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abs.s $f0, $f12 # CHECK: abs.s $f0, $f12 # encoding: [0x54,0x0c,0x03,0x7b]
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# CHECK-NEXT: # <MCInst #{{[0-9]+}} FABS_S_MM
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add.d $f0, $f2, $f4 # CHECK: add.d $f0, $f2, $f4 # encoding: [0x54,0x82,0x01,0x30]
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# CHECK-NEXT: # <MCInst #{{[0-9]+}} FADD_D64_MM
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cvt.d.s $f0, $f2 # CHECK: cvt.d.s $f0, $f2 # encoding: [0x54,0x02,0x13,0x7b]
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# CHECK-NEXT: # <MCInst #{{[0-9]+}} CVT_D64_S_MM
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cvt.d.w $f0, $f2 # CHECK: cvt.d.w $f0, $f2 # encoding: [0x54,0x02,0x33,0x7b]
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# CHECK-NEXT: # <MCInst #{{[0-9]+}} CVT_D64_W_MM
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cvt.s.d $f0, $f2 # CHECK: cvt.s.d $f0, $f2 # encoding: [0x54,0x02,0x1b,0x7b]
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# CHECK-NEXT: # <MCInst #{{[0-9]+}} CVT_S_D64_MM
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cvt.w.d $f0, $f2 # CHECK: cvt.w.d $f0, $f2 # encoding: [0x54,0x02,0x49,0x3b]
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# CHECK-NEXT: # <MCInst #{{[0-9]+}} CVT_W_D64_MM
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cvt.l.s $f4, $f2 # CHECK: cvt.l.s $f4, $f2 # encoding: [0x54,0x82,0x01,0x3b]
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# CHECK-NEXT: # <MCInst #{{[0-9]+}} CVT_L_S_MM
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cvt.l.d $f4, $f2 # CHECK: cvt.l.d $f4, $f2 # encoding: [0x54,0x82,0x41,0x3b]
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# CHECK-NEXT: # <MCInst #{{[0-9]+}} CVT_L_D64_MM
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div.d $f0, $f2, $f4 # CHECK: div.d $f0, $f2, $f4 # encoding: [0x54,0x82,0x01,0xf0]
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# CHECK-NEXT: # <MCInst #{{[0-9]+}} FDIV_D64_MM
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mfhc1 $4, $f0 # CHECK: mfhc1 $4, $f0 # encoding: [0x54,0x80,0x30,0x3b]
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# CHECK-NEXT: # <MCInst #{{[0-9]+}} MFHC1_D64_MM
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mov.d $f0, $f2 # CHECK: mov.d $f0, $f2 # encoding: [0x54,0x02,0x20,0x7b]
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# CHECK-NEXT: # <MCInst #{{[0-9]+}} FMOV_D64_MM
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mthc1 $4, $f0 # CHECK: mthc1 $4, $f0 # encoding: [0x54,0x80,0x38,0x3b]
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# CHECK-NEXT: # <MCInst #{{[0-9]+}} MTHC1_D64_MM
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mul.d $f0, $f2, $f4 # CHECK: mul.d $f0, $f2, $f4 # encoding: [0x54,0x82,0x01,0xb0]
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# CHECK-NEXT: # <MCInst #{{[0-9]+}} FMUL_D64_MM
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neg.d $f0, $f2 # CHECK: neg.d $f0, $f2 # encoding: [0x54,0x02,0x2b,0x7b]
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# CHECK-NEXT: # <MCInst #{{[0-9]+}} FNEG_D64_MM
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sqrt.d $f0, $f12 # CHECK: sqrt.d $f0, $f12 # encoding: [0x54,0x0c,0x4a,0x3b]
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# CHECK-NEXT: # <MCInst #{{[0-9]+}} FSQRT_D64_MM
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sqrt.s $f0, $f12 # CHECK: sqrt.s $f0, $f12 # encoding: [0x54,0x0c,0x0a,0x3b]
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# CHECK-NEXT: # <MCInst #{{[0-9]+}} FSQRT_S_MM
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sub.d $f0, $f2, $f4 # CHECK: sub.d $f0, $f2, $f4 # encoding: [0x54,0x82,0x01,0x70]
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# CHECK-NEXT: # <MCInst #{{[0-9]+}} FSUB_D64_MM
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