40 lines
1.3 KiB
ArmAsm
40 lines
1.3 KiB
ArmAsm
// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
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// ------------------------------------------------------------------------- //
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// Invalid predicate
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pfirst p0.h, p15, p0.h
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register
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// CHECK-NEXT: pfirst p0.h, p15, p0.h
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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pfirst p0.b, p15/z, p0.b
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
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// CHECK-NEXT: pfirst p0.b, p15/z, p0.b
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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pfirst p0.b, p15/m, p0.b
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
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// CHECK-NEXT: pfirst p0.b, p15/m, p0.b
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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pfirst p0.b, p15.b, p0.b
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register
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// CHECK-NEXT: pfirst p0.b, p15.b, p0.b
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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pfirst p0.b, p15.q, p0.b
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register
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// CHECK-NEXT: pfirst p0.b, p15.q, p0.b
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// ------------------------------------------------------------------------- //
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// Tied operands must match
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pfirst p0.b, p15, p1.b
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must match destination register
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// CHECK-NEXT: pfirst p0.b, p15, p1.b
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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