llvm-for-llvmta/test/CodeGen/X86/pr34855.ll

28 lines
1.0 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
define void @PR34855(<2 x i32> *%p0, <2 x i32> *%p1, <2 x i32> *%p2) {
; X86-LABEL: PR34855:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; X86-NEXT: movsd %xmm0, (%eax)
; X86-NEXT: retl
;
; X64-LABEL: PR34855:
; X64: # %bb.0:
; X64-NEXT: movq (%rdi), %rax
; X64-NEXT: movq %rax, (%rdx)
; X64-NEXT: retq
%tmp = load <2 x i32>, <2 x i32>* %p0, align 8
%tmp1 = load <2 x i32>, <2 x i32>* %p1, align 8
%mul = mul <2 x i32> zeroinitializer, %tmp1
%mul1 = mul <2 x i32> <i32 -8190, i32 -8190>, %mul
%mul2 = mul <2 x i32> <i32 3, i32 3>, %mul1
%shr = ashr <2 x i32> %tmp, %mul2
store <2 x i32> %shr, <2 x i32>* %p2, align 8
ret void
}