166 lines
4.6 KiB
LLVM
166 lines
4.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=thumbv7m-none-eabi -o - | FileCheck %s
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; 0xff00ff00 = 4278255360
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; 0x00ff00ff = 16711935
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define i32 @rev16(i32 %a) {
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; CHECK-LABEL: rev16:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: rev16 r0, r0
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; CHECK-NEXT: bx lr
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%l8 = shl i32 %a, 8
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%r8 = lshr i32 %a, 8
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%mask_l8 = and i32 %l8, 4278255360
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%mask_r8 = and i32 %r8, 16711935
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%tmp = or i32 %mask_l8, %mask_r8
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ret i32 %tmp
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}
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define i32 @not_rev16(i32 %a) {
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; CHECK-LABEL: not_rev16:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: mov.w r1, #65280
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; CHECK-NEXT: and.w r1, r1, r0, lsr #8
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; CHECK-NEXT: and r0, r0, #65280
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; CHECK-NEXT: orr.w r0, r1, r0, lsl #8
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; CHECK-NEXT: bx lr
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%l8 = shl i32 %a, 8
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%r8 = lshr i32 %a, 8
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%mask_r8 = and i32 %r8, 4278255360
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%mask_l8 = and i32 %l8, 16711935
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%tmp = or i32 %mask_r8, %mask_l8
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ret i32 %tmp
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}
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define i32 @extra_maskop_uses2(i32 %a) {
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; CHECK-LABEL: extra_maskop_uses2:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: mov.w r1, #-16711936
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; CHECK-NEXT: mov.w r2, #16711935
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; CHECK-NEXT: and.w r1, r1, r0, lsl #8
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; CHECK-NEXT: and.w r0, r2, r0, lsr #8
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; CHECK-NEXT: adds r2, r0, r1
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; CHECK-NEXT: muls r0, r1, r0
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; CHECK-NEXT: muls r0, r2, r0
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; CHECK-NEXT: bx lr
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%l8 = shl i32 %a, 8
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%r8 = lshr i32 %a, 8
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%mask_l8 = and i32 %l8, 4278255360
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%mask_r8 = and i32 %r8, 16711935
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%or = or i32 %mask_r8, %mask_l8
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%mul = mul i32 %mask_r8, %mask_l8 ; another use of the mask ops
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%r = mul i32 %mul, %or ; and use that result
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ret i32 %r
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}
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define i32 @bswap_ror_commuted(i32 %a) {
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; CHECK-LABEL: bswap_ror_commuted:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: rev16 r0, r0
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; CHECK-NEXT: bx lr
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%l8 = shl i32 %a, 8
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%r8 = lshr i32 %a, 8
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%mask_l8 = and i32 %l8, 4278255360
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%mask_r8 = and i32 %r8, 16711935
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%tmp = or i32 %mask_r8, %mask_l8
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ret i32 %tmp
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}
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define i32 @different_shift_amount(i32 %a) {
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; CHECK-LABEL: different_shift_amount:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: mov.w r1, #16711935
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; CHECK-NEXT: movw r2, #65024
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; CHECK-NEXT: and.w r1, r1, r0, lsr #8
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; CHECK-NEXT: movt r2, #65280
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; CHECK-NEXT: and.w r0, r2, r0, lsl #9
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; CHECK-NEXT: add r0, r1
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; CHECK-NEXT: bx lr
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%l8 = shl i32 %a, 9
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%r8 = lshr i32 %a, 8
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%mask_l8 = and i32 %l8, 4278255360
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%mask_r8 = and i32 %r8, 16711935
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%tmp = or i32 %mask_l8, %mask_r8
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ret i32 %tmp
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}
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define i32 @different_constant(i32 %a) {
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; CHECK-LABEL: different_constant:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: mov.w r1, #16711935
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; CHECK-NEXT: and.w r0, r1, r0, lsr #8
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; CHECK-NEXT: bx lr
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%l8 = shl i32 %a, 8
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%r8 = lshr i32 %a, 8
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%mask_l8 = and i32 %l8, 42
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%mask_r8 = and i32 %r8, 16711935
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%tmp = or i32 %mask_l8, %mask_r8
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ret i32 %tmp
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}
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define i32 @different_op(i32 %a) {
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; CHECK-LABEL: different_op:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: mov.w r1, #16711935
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; CHECK-NEXT: movw r2, #256
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; CHECK-NEXT: and.w r1, r1, r0, lsr #8
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; CHECK-NEXT: movt r2, #255
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; CHECK-NEXT: add.w r0, r2, r0, lsl #8
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; CHECK-NEXT: orrs r0, r1
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; CHECK-NEXT: bx lr
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%l8 = shl i32 %a, 8
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%r8 = lshr i32 %a, 8
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%mask_l8 = sub i32 %l8, 4278255360
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%mask_r8 = and i32 %r8, 16711935
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%tmp = or i32 %mask_l8, %mask_r8
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ret i32 %tmp
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}
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define i32 @different_vars(i32 %a, i32 %b) {
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; CHECK-LABEL: different_vars:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: mov.w r2, #16711935
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; CHECK-NEXT: and.w r1, r2, r1, lsr #8
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; CHECK-NEXT: mov.w r2, #-16711936
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; CHECK-NEXT: and.w r0, r2, r0, lsl #8
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; CHECK-NEXT: add r0, r1
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; CHECK-NEXT: bx lr
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%l8 = shl i32 %a, 8
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%r8 = lshr i32 %b, 8
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%mask_l8 = and i32 %l8, 4278255360
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%mask_r8 = and i32 %r8, 16711935
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%tmp = or i32 %mask_l8, %mask_r8
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ret i32 %tmp
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}
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; FIXME: this rev16 pattern is not matching
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; 0xff000000 = 4278190080
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; 0x00ff0000 = 16711680
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; 0x0000ff00 = 65280
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; 0x000000ff = 255
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define i32 @f2(i32 %a) {
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; CHECK-LABEL: f2:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: mov.w r1, #16711680
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; CHECK-NEXT: and r2, r0, #16711680
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; CHECK-NEXT: and.w r1, r1, r0, lsr #8
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; CHECK-NEXT: orr.w r1, r1, r2, lsl #8
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; CHECK-NEXT: ubfx r2, r0, #8, #8
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; CHECK-NEXT: bfi r2, r0, #8, #8
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; CHECK-NEXT: adds r0, r2, r1
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; CHECK-NEXT: bx lr
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%l8 = shl i32 %a, 8
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%r8 = lshr i32 %a, 8
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%masklo_l8 = and i32 %l8, 65280
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%maskhi_l8 = and i32 %l8, 4278190080
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%masklo_r8 = and i32 %r8, 255
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%maskhi_r8 = and i32 %r8, 16711680
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%tmp1 = or i32 %masklo_l8, %masklo_r8
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%tmp2 = or i32 %maskhi_l8, %maskhi_r8
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%tmp = or i32 %tmp1, %tmp2
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ret i32 %tmp
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}
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