llvm-for-llvmta/test/CodeGen/RISCV/rvv/cleanup-vsetivli.mir

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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc %s -mtriple=riscv64 -run-pass=riscv-cleanup-vsetvli -o - | FileCheck %s
# Make sure we don't combine these VSET{I}VLIs in the cleanup pass. We could not
# differentiate AVL values if the opcode of the previous one is different from
# current one.
--- |
; ModuleID = '../llvm/test/CodeGen/RISCV/rvv/add-vsetivli.ll'
source_filename = "../llvm/test/CodeGen/RISCV/rvv/add-vsetivli.ll"
target datalayout = "e-m:e-p:64:64-i64:64-i128:128-n64-S128"
target triple = "riscv64"
define void @cleanup_vsetivli() #0 {
ret void
}
attributes #0 = { "target-features"="+experimental-v" }
...
---
name: cleanup_vsetivli
alignment: 4
tracksRegLiveness: true
registers:
- { id: 0, class: gpr }
frameInfo:
maxAlignment: 1
machineFunctionInfo: {}
body: |
bb.0 (%ir-block.0):
; CHECK-LABEL: name: cleanup_vsetivli
; CHECK: dead %0:gpr = PseudoVSETVLI $x0, 12, implicit-def $vl, implicit-def $vtype
; CHECK: dead %1:gpr = PseudoVSETIVLI 5, 12, implicit-def $vl, implicit-def $vtype
; CHECK: dead %3:gpr = PseudoVSETVLI $x0, 12, implicit-def $vl, implicit-def $vtype
; CHECK: dead %5:gpr = PseudoVSETIVLI 5, 12, implicit-def $vl, implicit-def $vtype
; CHECK: PseudoRET
dead %0:gpr = PseudoVSETVLI $x0, 12, implicit-def $vl, implicit-def $vtype
dead %1:gpr = PseudoVSETIVLI 5, 12, implicit-def $vl, implicit-def $vtype
dead %2:gpr = PseudoVSETIVLI 5, 12, implicit-def $vl, implicit-def $vtype
dead %3:gpr = PseudoVSETVLI $x0, 12, implicit-def $vl, implicit-def $vtype
dead %4:gpr = PseudoVSETVLI $x0, 12, implicit-def $vl, implicit-def $vtype
dead %5:gpr = PseudoVSETIVLI 5, 12, implicit-def $vl, implicit-def $vtype
PseudoRET
...