llvm-for-llvmta/test/CodeGen/Mips/selectiondag-optlevel.ll

23 lines
685 B
LLVM

; RUN: llc -march=mips -fast-isel=false -O0 < %s 2>&1 | FileCheck %s -check-prefix=O0
; RUN: llc -march=mips -fast-isel=false -O2 < %s 2>&1 | FileCheck %s -check-prefix=O2
; At -O0, DAGCombine won't try to merge these consecutive loads but it will at
; -O2.
define void @foo() nounwind {
entry:
%0 = alloca [2 x i8], align 32
%1 = getelementptr inbounds [2 x i8], [2 x i8]* %0, i32 0, i32 0
store i8 1, i8* %1
%2 = getelementptr inbounds [2 x i8], [2 x i8]* %0, i32 0, i32 1
store i8 1, i8* %2
ret void
}
; O0: addiu $[[REG:[0-9]+]], $zero, 1
; O0-DAG: sb $[[REG]], 0($sp)
; O0-DAG: sb $[[REG]], 1($sp)
; O2: addiu $[[REG:[0-9]+]], $zero, 257
; O2: sh $[[REG]], 0($sp)