llvm-for-llvmta/test/CodeGen/Mips/micromips-sizereduction/micromips-movep.mir

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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=mipsel-unknown-linux-gnu -mattr=+micromips -mcpu=mips32r2 \
# RUN: -verify-machineinstrs -run-pass micromips-reduce-size \
# RUN: %s -o - | FileCheck %s
--- |
define i64 @move1() { ret i64 0 }
define i64 @move2() { ret i64 0 }
declare i64 @f(i64 signext)
declare i64 @g()
...
---
name: move1
stack:
- { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4,
stack-id: default, callee-saved-register: '$ra', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
constants:
body: |
bb.0:
liveins: $ra
; CHECK-LABEL: name: move1
; CHECK: ADDIUSP_MM -24
; CHECK: CFI_INSTRUCTION def_cfa_offset 24
; CHECK: SWSP_MM killed $ra, $sp, 20 :: (store 4 into %stack.0)
; CHECK: CFI_INSTRUCTION offset $ra_64, -4
; CHECK: JAL_MM @g, csr_o32, implicit-def dead $ra, implicit-def $sp, implicit-def $v0, implicit-def $v1
; CHECK: $a0, $a1 = MOVEP_MM $v0, $v1
; CHECK: JAL_MM @f, csr_o32, implicit-def dead $ra, implicit $a0, implicit $a1, implicit-def $sp, implicit-def $v0, implicit-def $v1
; CHECK: $ra = LWSP_MM $sp, 20 :: (load 4 from %stack.0)
; CHECK: ADDIUSP_MM 24
; CHECK: PseudoReturn undef $ra, implicit $v0, implicit $v1
$sp = ADDiu $sp, -24
CFI_INSTRUCTION def_cfa_offset 24
SW killed $ra, $sp, 20 :: (store 4 into %stack.0)
CFI_INSTRUCTION offset $ra_64, -4
JAL_MM @g, csr_o32, implicit-def dead $ra, implicit-def $sp, implicit-def $v0, implicit-def $v1
$a0 = MOVE16_MM $v0
$a1 = MOVE16_MM $v1
JAL_MM @f, csr_o32, implicit-def dead $ra, implicit $a0, implicit $a1, implicit-def $sp, implicit-def $v0, implicit-def $v1
$ra = LW $sp, 20 :: (load 4 from %stack.0)
$sp = ADDiu $sp, 24
PseudoReturn undef $ra, implicit $v0, implicit $v1
...
---
name: move2
stack:
- { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4,
stack-id: default, callee-saved-register: '$ra', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
constants:
body: |
bb.0:
liveins: $ra
; CHECK-LABEL: name: move2
; CHECK: ADDIUSP_MM -24
; CHECK: CFI_INSTRUCTION def_cfa_offset 24
; CHECK: SWSP_MM killed $ra, $sp, 20 :: (store 4 into %stack.0)
; CHECK: CFI_INSTRUCTION offset $ra_64, -4
; CHECK: JAL_MM @g, csr_o32, implicit-def dead $ra, implicit-def $sp, implicit-def $v0, implicit-def $v1
; CHECK: $a0, $a1 = MOVEP_MM $v0, $v1
; CHECK: JAL_MM @f, csr_o32, implicit-def dead $ra, implicit $a0, implicit $a1, implicit-def $sp, implicit-def $v0, implicit-def $v1
; CHECK: $ra = LWSP_MM $sp, 20 :: (load 4 from %stack.0)
; CHECK: ADDIUSP_MM 24
; CHECK: PseudoReturn undef $ra, implicit $v0, implicit $v1
$sp = ADDiu $sp, -24
CFI_INSTRUCTION def_cfa_offset 24
SW killed $ra, $sp, 20 :: (store 4 into %stack.0)
CFI_INSTRUCTION offset $ra_64, -4
JAL_MM @g, csr_o32, implicit-def dead $ra, implicit-def $sp, implicit-def $v0, implicit-def $v1
$a1 = MOVE16_MM $v1
$a0 = MOVE16_MM $v0
JAL_MM @f, csr_o32, implicit-def dead $ra, implicit $a0, implicit $a1, implicit-def $sp, implicit-def $v0, implicit-def $v1
$ra = LW $sp, 20 :: (load 4 from %stack.0)
$sp = ADDiu $sp, 24
PseudoReturn undef $ra, implicit $v0, implicit $v1
...
---