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llvm-for-llvmta/test/CodeGen/Mips/GlobalISel/regbankselect/phi.mir

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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=regbankselect -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
--- |
define i32 @phi_i32(i1 %cnd, i32 %a, i32 %b) {
entry:
br i1 %cnd, label %cond.true, label %cond.false
cond.true: ; preds = %entry
br label %cond.end
cond.false: ; preds = %entry
br label %cond.end
cond.end: ; preds = %cond.false, %cond.true
%cond = phi i32 [ %a, %cond.true ], [ %b, %cond.false ]
ret i32 %cond
}
define i64 @phi_i64(i1 %cnd, i64 %a, i64 %b) {
entry:
br i1 %cnd, label %cond.true, label %cond.false
cond.true: ; preds = %entry
br label %cond.end
cond.false: ; preds = %entry
br label %cond.end
cond.end: ; preds = %cond.false, %cond.true
%cond = phi i64 [ %a, %cond.true ], [ %b, %cond.false ]
ret i64 %cond
}
define void @phi_ambiguous_i64_in_fpr(i1 %cnd, i64* %i64_ptr_a, i64* %i64_ptr_b, i64* %i64_ptr_c) {
entry:
%0 = load i64, i64* %i64_ptr_a, align 8
%1 = load i64, i64* %i64_ptr_b, align 8
br i1 %cnd, label %cond.true, label %cond.false
cond.true: ; preds = %entry
br label %cond.end
cond.false: ; preds = %entry
br label %cond.end
cond.end: ; preds = %cond.false, %cond.true
%cond = phi i64 [ %0, %cond.true ], [ %1, %cond.false ]
store i64 %cond, i64* %i64_ptr_c, align 8
ret void
}
define float @phi_float(i1 %cnd, float %a, float %b) {
entry:
br i1 %cnd, label %cond.true, label %cond.false
cond.true: ; preds = %entry
br label %cond.end
cond.false: ; preds = %entry
br label %cond.end
cond.end: ; preds = %cond.false, %cond.true
%cond = phi float [ %a, %cond.true ], [ %b, %cond.false ]
ret float %cond
}
define void @phi_ambiguous_float_in_gpr(i1 %cnd, float* %f32_ptr_a, float* %f32_ptr_b, float* %f32_ptr_c) {
entry:
%0 = load float, float* %f32_ptr_a, align 4
%1 = load float, float* %f32_ptr_b, align 4
br i1 %cnd, label %cond.true, label %cond.false
cond.true: ; preds = %entry
br label %cond.end
cond.false: ; preds = %entry
br label %cond.end
cond.end: ; preds = %cond.false, %cond.true
%cond = phi float [ %0, %cond.true ], [ %1, %cond.false ]
store float %cond, float* %f32_ptr_c, align 4
ret void
}
define double @phi_double(double %a, double %b, i1 %cnd) {
entry:
br i1 %cnd, label %cond.true, label %cond.false
cond.true: ; preds = %entry
br label %cond.end
cond.false: ; preds = %entry
br label %cond.end
cond.end: ; preds = %cond.false, %cond.true
%cond = phi double [ %a, %cond.true ], [ %b, %cond.false ]
ret double %cond
}
...
---
name: phi_i32
alignment: 4
legalized: true
tracksRegLiveness: true
body: |
; MIPS32-LABEL: name: phi_i32
; MIPS32: bb.0.entry:
; MIPS32: successors: %bb.1(0x40000000), %bb.2(0x40000000)
; MIPS32: liveins: $a0, $a1, $a2
; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0
; MIPS32: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $a1
; MIPS32: [[COPY2:%[0-9]+]]:gprb(s32) = COPY $a2
; MIPS32: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1
; MIPS32: [[COPY3:%[0-9]+]]:gprb(s32) = COPY [[COPY]](s32)
; MIPS32: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY3]], [[C]]
; MIPS32: G_BRCOND [[AND]](s32), %bb.1
; MIPS32: G_BR %bb.2
; MIPS32: bb.1.cond.true:
; MIPS32: successors: %bb.3(0x80000000)
; MIPS32: G_BR %bb.3
; MIPS32: bb.2.cond.false:
; MIPS32: successors: %bb.3(0x80000000)
; MIPS32: bb.3.cond.end:
; MIPS32: [[PHI:%[0-9]+]]:gprb(s32) = G_PHI [[COPY1]](s32), %bb.1, [[COPY2]](s32), %bb.2
; MIPS32: $v0 = COPY [[PHI]](s32)
; MIPS32: RetRA implicit $v0
bb.1.entry:
liveins: $a0, $a1, $a2
%3:_(s32) = COPY $a0
%1:_(s32) = COPY $a1
%2:_(s32) = COPY $a2
%6:_(s32) = G_CONSTANT i32 1
%7:_(s32) = COPY %3(s32)
%5:_(s32) = G_AND %7, %6
G_BRCOND %5(s32), %bb.2
G_BR %bb.3
bb.2.cond.true:
G_BR %bb.4
bb.3.cond.false:
bb.4.cond.end:
%4:_(s32) = G_PHI %1(s32), %bb.2, %2(s32), %bb.3
$v0 = COPY %4(s32)
RetRA implicit $v0
...
---
name: phi_i64
alignment: 4
legalized: true
tracksRegLiveness: true
fixedStack:
- { id: 0, offset: 20, size: 4, alignment: 4, isImmutable: true }
- { id: 1, offset: 16, size: 4, alignment: 8, isImmutable: true }
body: |
; MIPS32-LABEL: name: phi_i64
; MIPS32: bb.0.entry:
; MIPS32: successors: %bb.1(0x40000000), %bb.2(0x40000000)
; MIPS32: liveins: $a0, $a2, $a3
; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0
; MIPS32: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $a2
; MIPS32: [[COPY2:%[0-9]+]]:gprb(s32) = COPY $a3
; MIPS32: [[FRAME_INDEX:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.0
; MIPS32: [[LOAD:%[0-9]+]]:gprb(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (load 4 from %fixed-stack.0, align 8)
; MIPS32: [[FRAME_INDEX1:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.1
; MIPS32: [[LOAD1:%[0-9]+]]:gprb(s32) = G_LOAD [[FRAME_INDEX1]](p0) :: (load 4 from %fixed-stack.1)
; MIPS32: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1
; MIPS32: [[COPY3:%[0-9]+]]:gprb(s32) = COPY [[COPY]](s32)
; MIPS32: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY3]], [[C]]
; MIPS32: G_BRCOND [[AND]](s32), %bb.1
; MIPS32: G_BR %bb.2
; MIPS32: bb.1.cond.true:
; MIPS32: successors: %bb.3(0x80000000)
; MIPS32: G_BR %bb.3
; MIPS32: bb.2.cond.false:
; MIPS32: successors: %bb.3(0x80000000)
; MIPS32: bb.3.cond.end:
; MIPS32: [[PHI:%[0-9]+]]:gprb(s32) = G_PHI [[COPY1]](s32), %bb.1, [[LOAD]](s32), %bb.2
; MIPS32: [[PHI1:%[0-9]+]]:gprb(s32) = G_PHI [[COPY2]](s32), %bb.1, [[LOAD1]](s32), %bb.2
; MIPS32: $v0 = COPY [[PHI]](s32)
; MIPS32: $v1 = COPY [[PHI1]](s32)
; MIPS32: RetRA implicit $v0, implicit $v1
bb.1.entry:
liveins: $a0, $a2, $a3
%3:_(s32) = COPY $a0
%4:_(s32) = COPY $a2
%5:_(s32) = COPY $a3
%1:_(s64) = G_MERGE_VALUES %4(s32), %5(s32)
%8:_(p0) = G_FRAME_INDEX %fixed-stack.1
%6:_(s32) = G_LOAD %8(p0) :: (load 4 from %fixed-stack.1, align 8)
%9:_(p0) = G_FRAME_INDEX %fixed-stack.0
%7:_(s32) = G_LOAD %9(p0) :: (load 4 from %fixed-stack.0)
%2:_(s64) = G_MERGE_VALUES %6(s32), %7(s32)
%14:_(s32) = G_CONSTANT i32 1
%15:_(s32) = COPY %3(s32)
%13:_(s32) = G_AND %15, %14
G_BRCOND %13(s32), %bb.2
G_BR %bb.3
bb.2.cond.true:
G_BR %bb.4
bb.3.cond.false:
bb.4.cond.end:
%10:_(s64) = G_PHI %1(s64), %bb.2, %2(s64), %bb.3
%11:_(s32), %12:_(s32) = G_UNMERGE_VALUES %10(s64)
$v0 = COPY %11(s32)
$v1 = COPY %12(s32)
RetRA implicit $v0, implicit $v1
...
---
name: phi_ambiguous_i64_in_fpr
alignment: 4
legalized: true
tracksRegLiveness: true
body: |
; MIPS32-LABEL: name: phi_ambiguous_i64_in_fpr
; MIPS32: bb.0.entry:
; MIPS32: successors: %bb.1(0x40000000), %bb.2(0x40000000)
; MIPS32: liveins: $a0, $a1, $a2, $a3
; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0
; MIPS32: [[COPY1:%[0-9]+]]:gprb(p0) = COPY $a1
; MIPS32: [[COPY2:%[0-9]+]]:gprb(p0) = COPY $a2
; MIPS32: [[COPY3:%[0-9]+]]:gprb(p0) = COPY $a3
; MIPS32: [[LOAD:%[0-9]+]]:fprb(s64) = G_LOAD [[COPY1]](p0) :: (load 8 from %ir.i64_ptr_a)
; MIPS32: [[LOAD1:%[0-9]+]]:fprb(s64) = G_LOAD [[COPY2]](p0) :: (load 8 from %ir.i64_ptr_b)
; MIPS32: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1
; MIPS32: [[COPY4:%[0-9]+]]:gprb(s32) = COPY [[COPY]](s32)
; MIPS32: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY4]], [[C]]
; MIPS32: G_BRCOND [[AND]](s32), %bb.1
; MIPS32: G_BR %bb.2
; MIPS32: bb.1.cond.true:
; MIPS32: successors: %bb.3(0x80000000)
; MIPS32: G_BR %bb.3
; MIPS32: bb.2.cond.false:
; MIPS32: successors: %bb.3(0x80000000)
; MIPS32: bb.3.cond.end:
; MIPS32: [[PHI:%[0-9]+]]:fprb(s64) = G_PHI [[LOAD]](s64), %bb.1, [[LOAD1]](s64), %bb.2
; MIPS32: G_STORE [[PHI]](s64), [[COPY3]](p0) :: (store 8 into %ir.i64_ptr_c)
; MIPS32: RetRA
bb.1.entry:
liveins: $a0, $a1, $a2, $a3
%4:_(s32) = COPY $a0
%1:_(p0) = COPY $a1
%2:_(p0) = COPY $a2
%3:_(p0) = COPY $a3
%5:_(s64) = G_LOAD %1(p0) :: (load 8 from %ir.i64_ptr_a)
%6:_(s64) = G_LOAD %2(p0) :: (load 8 from %ir.i64_ptr_b)
%9:_(s32) = G_CONSTANT i32 1
%10:_(s32) = COPY %4(s32)
%8:_(s32) = G_AND %10, %9
G_BRCOND %8(s32), %bb.2
G_BR %bb.3
bb.2.cond.true:
G_BR %bb.4
bb.3.cond.false:
bb.4.cond.end:
%7:_(s64) = G_PHI %5(s64), %bb.2, %6(s64), %bb.3
G_STORE %7(s64), %3(p0) :: (store 8 into %ir.i64_ptr_c)
RetRA
...
---
name: phi_float
alignment: 4
legalized: true
tracksRegLiveness: true
body: |
; MIPS32-LABEL: name: phi_float
; MIPS32: bb.0.entry:
; MIPS32: successors: %bb.1(0x40000000), %bb.2(0x40000000)
; MIPS32: liveins: $a0, $a1, $a2
; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0
; MIPS32: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $a1
; MIPS32: [[COPY2:%[0-9]+]]:gprb(s32) = COPY $a2
; MIPS32: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1
; MIPS32: [[COPY3:%[0-9]+]]:gprb(s32) = COPY [[COPY]](s32)
; MIPS32: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY3]], [[C]]
; MIPS32: G_BRCOND [[AND]](s32), %bb.1
; MIPS32: G_BR %bb.2
; MIPS32: bb.1.cond.true:
; MIPS32: successors: %bb.3(0x80000000)
; MIPS32: G_BR %bb.3
; MIPS32: bb.2.cond.false:
; MIPS32: successors: %bb.3(0x80000000)
; MIPS32: bb.3.cond.end:
; MIPS32: [[PHI:%[0-9]+]]:gprb(s32) = G_PHI [[COPY1]](s32), %bb.1, [[COPY2]](s32), %bb.2
; MIPS32: $f0 = COPY [[PHI]](s32)
; MIPS32: RetRA implicit $f0
bb.1.entry:
liveins: $a0, $a1, $a2
%3:_(s32) = COPY $a0
%1:_(s32) = COPY $a1
%2:_(s32) = COPY $a2
%6:_(s32) = G_CONSTANT i32 1
%7:_(s32) = COPY %3(s32)
%5:_(s32) = G_AND %7, %6
G_BRCOND %5(s32), %bb.2
G_BR %bb.3
bb.2.cond.true:
G_BR %bb.4
bb.3.cond.false:
bb.4.cond.end:
%4:_(s32) = G_PHI %1(s32), %bb.2, %2(s32), %bb.3
$f0 = COPY %4(s32)
RetRA implicit $f0
...
---
name: phi_ambiguous_float_in_gpr
alignment: 4
legalized: true
tracksRegLiveness: true
body: |
; MIPS32-LABEL: name: phi_ambiguous_float_in_gpr
; MIPS32: bb.0.entry:
; MIPS32: successors: %bb.1(0x40000000), %bb.2(0x40000000)
; MIPS32: liveins: $a0, $a1, $a2, $a3
; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0
; MIPS32: [[COPY1:%[0-9]+]]:gprb(p0) = COPY $a1
; MIPS32: [[COPY2:%[0-9]+]]:gprb(p0) = COPY $a2
; MIPS32: [[COPY3:%[0-9]+]]:gprb(p0) = COPY $a3
; MIPS32: [[LOAD:%[0-9]+]]:gprb(s32) = G_LOAD [[COPY1]](p0) :: (load 4 from %ir.f32_ptr_a)
; MIPS32: [[LOAD1:%[0-9]+]]:gprb(s32) = G_LOAD [[COPY2]](p0) :: (load 4 from %ir.f32_ptr_b)
; MIPS32: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1
; MIPS32: [[COPY4:%[0-9]+]]:gprb(s32) = COPY [[COPY]](s32)
; MIPS32: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY4]], [[C]]
; MIPS32: G_BRCOND [[AND]](s32), %bb.1
; MIPS32: G_BR %bb.2
; MIPS32: bb.1.cond.true:
; MIPS32: successors: %bb.3(0x80000000)
; MIPS32: G_BR %bb.3
; MIPS32: bb.2.cond.false:
; MIPS32: successors: %bb.3(0x80000000)
; MIPS32: bb.3.cond.end:
; MIPS32: [[PHI:%[0-9]+]]:gprb(s32) = G_PHI [[LOAD]](s32), %bb.1, [[LOAD1]](s32), %bb.2
; MIPS32: G_STORE [[PHI]](s32), [[COPY3]](p0) :: (store 4 into %ir.f32_ptr_c)
; MIPS32: RetRA
bb.1.entry:
liveins: $a0, $a1, $a2, $a3
%4:_(s32) = COPY $a0
%1:_(p0) = COPY $a1
%2:_(p0) = COPY $a2
%3:_(p0) = COPY $a3
%5:_(s32) = G_LOAD %1(p0) :: (load 4 from %ir.f32_ptr_a)
%6:_(s32) = G_LOAD %2(p0) :: (load 4 from %ir.f32_ptr_b)
%9:_(s32) = G_CONSTANT i32 1
%10:_(s32) = COPY %4(s32)
%8:_(s32) = G_AND %10, %9
G_BRCOND %8(s32), %bb.2
G_BR %bb.3
bb.2.cond.true:
G_BR %bb.4
bb.3.cond.false:
bb.4.cond.end:
%7:_(s32) = G_PHI %5(s32), %bb.2, %6(s32), %bb.3
G_STORE %7(s32), %3(p0) :: (store 4 into %ir.f32_ptr_c)
RetRA
...
---
name: phi_double
alignment: 4
legalized: true
tracksRegLiveness: true
fixedStack:
- { id: 0, offset: 16, size: 4, alignment: 8, isImmutable: true }
body: |
; MIPS32-LABEL: name: phi_double
; MIPS32: bb.0.entry:
; MIPS32: successors: %bb.1(0x40000000), %bb.2(0x40000000)
; MIPS32: liveins: $d6, $d7
; MIPS32: [[COPY:%[0-9]+]]:fprb(s64) = COPY $d6
; MIPS32: [[COPY1:%[0-9]+]]:fprb(s64) = COPY $d7
; MIPS32: [[FRAME_INDEX:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.0
; MIPS32: [[LOAD:%[0-9]+]]:gprb(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (load 4 from %fixed-stack.0, align 8)
; MIPS32: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1
; MIPS32: [[COPY2:%[0-9]+]]:gprb(s32) = COPY [[LOAD]](s32)
; MIPS32: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY2]], [[C]]
; MIPS32: G_BRCOND [[AND]](s32), %bb.1
; MIPS32: G_BR %bb.2
; MIPS32: bb.1.cond.true:
; MIPS32: successors: %bb.3(0x80000000)
; MIPS32: G_BR %bb.3
; MIPS32: bb.2.cond.false:
; MIPS32: successors: %bb.3(0x80000000)
; MIPS32: bb.3.cond.end:
; MIPS32: [[PHI:%[0-9]+]]:fprb(s64) = G_PHI [[COPY]](s64), %bb.1, [[COPY1]](s64), %bb.2
; MIPS32: $d0 = COPY [[PHI]](s64)
; MIPS32: RetRA implicit $d0
bb.1.entry:
liveins: $d6, $d7
%0:_(s64) = COPY $d6
%1:_(s64) = COPY $d7
%4:_(p0) = G_FRAME_INDEX %fixed-stack.0
%3:_(s32) = G_LOAD %4(p0) :: (load 4 from %fixed-stack.0, align 8)
%7:_(s32) = G_CONSTANT i32 1
%8:_(s32) = COPY %3(s32)
%6:_(s32) = G_AND %8, %7
G_BRCOND %6(s32), %bb.2
G_BR %bb.3
bb.2.cond.true:
G_BR %bb.4
bb.3.cond.false:
bb.4.cond.end:
%5:_(s64) = G_PHI %0(s64), %bb.2, %1(s64), %bb.3
$d0 = COPY %5(s64)
RetRA implicit $d0
...
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