llvm-for-llvmta/test/CodeGen/Mips/GlobalISel/regbankselect/ctlz.mir

24 lines
715 B
YAML

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=regbankselect -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
---
name: ctlz_i32
alignment: 4
legalized: true
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0
; MIPS32-LABEL: name: ctlz_i32
; MIPS32: liveins: $a0
; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0
; MIPS32: [[CTLZ:%[0-9]+]]:gprb(s32) = G_CTLZ [[COPY]](s32)
; MIPS32: $v0 = COPY [[CTLZ]](s32)
; MIPS32: RetRA implicit $v0
%0:_(s32) = COPY $a0
%1:_(s32) = G_CTLZ %0(s32)
$v0 = COPY %1(s32)
RetRA implicit $v0
...