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llvm-for-llvmta/test/CodeGen/Mips/GlobalISel/legalizer/sitofp_and_uitofp.mir

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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=FP32
# RUN: llc -O0 -mtriple=mipsel-linux-gnu -mattr=+fp64,+mips32r2 -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=FP64
--- |
define void @i64tof32() {entry: ret void}
define void @i32tof32() {entry: ret void}
define void @i16tof32() {entry: ret void}
define void @i8tof32() {entry: ret void}
define void @i64tof64() {entry: ret void}
define void @i32tof64() {entry: ret void}
define void @i16tof64() {entry: ret void}
define void @i8tof64() {entry: ret void}
define void @u64tof32() {entry: ret void}
define void @u32tof32() {entry: ret void}
define void @u16tof32() {entry: ret void}
define void @u8tof32() {entry: ret void}
define void @u64tof64() {entry: ret void}
define void @u32tof64() {entry: ret void}
define void @u16tof64() {entry: ret void}
define void @u8tof64() {entry: ret void}
...
---
name: i64tof32
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0, $a1
; FP32-LABEL: name: i64tof32
; FP32: liveins: $a0, $a1
; FP32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
; FP32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
; FP32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
; FP32: $a0 = COPY [[COPY]](s32)
; FP32: $a1 = COPY [[COPY1]](s32)
; FP32: JAL &__floatdisf, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit $a1, implicit-def $f0
; FP32: [[COPY2:%[0-9]+]]:_(s32) = COPY $f0
; FP32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
; FP32: $f0 = COPY [[COPY2]](s32)
; FP32: RetRA implicit $f0
; FP64-LABEL: name: i64tof32
; FP64: liveins: $a0, $a1
; FP64: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
; FP64: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
; FP64: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
; FP64: $a0 = COPY [[COPY]](s32)
; FP64: $a1 = COPY [[COPY1]](s32)
; FP64: JAL &__floatdisf, csr_o32_fp64, implicit-def $ra, implicit-def $sp, implicit $a0, implicit $a1, implicit-def $f0
; FP64: [[COPY2:%[0-9]+]]:_(s32) = COPY $f0
; FP64: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
; FP64: $f0 = COPY [[COPY2]](s32)
; FP64: RetRA implicit $f0
%1:_(s32) = COPY $a0
%2:_(s32) = COPY $a1
%0:_(s64) = G_MERGE_VALUES %1(s32), %2(s32)
%3:_(s32) = G_SITOFP %0(s64)
$f0 = COPY %3(s32)
RetRA implicit $f0
...
---
name: i32tof32
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0
; FP32-LABEL: name: i32tof32
; FP32: liveins: $a0
; FP32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
; FP32: [[SITOFP:%[0-9]+]]:_(s32) = G_SITOFP [[COPY]](s32)
; FP32: $f0 = COPY [[SITOFP]](s32)
; FP32: RetRA implicit $f0
; FP64-LABEL: name: i32tof32
; FP64: liveins: $a0
; FP64: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
; FP64: [[SITOFP:%[0-9]+]]:_(s32) = G_SITOFP [[COPY]](s32)
; FP64: $f0 = COPY [[SITOFP]](s32)
; FP64: RetRA implicit $f0
%0:_(s32) = COPY $a0
%1:_(s32) = G_SITOFP %0(s32)
$f0 = COPY %1(s32)
RetRA implicit $f0
...
---
name: i16tof32
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0
; FP32-LABEL: name: i16tof32
; FP32: liveins: $a0
; FP32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
; FP32: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
; FP32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; FP32: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C]](s32)
; FP32: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; FP32: [[SITOFP:%[0-9]+]]:_(s32) = G_SITOFP [[ASHR]](s32)
; FP32: $f0 = COPY [[SITOFP]](s32)
; FP32: RetRA implicit $f0
; FP64-LABEL: name: i16tof32
; FP64: liveins: $a0
; FP64: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
; FP64: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
; FP64: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; FP64: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C]](s32)
; FP64: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; FP64: [[SITOFP:%[0-9]+]]:_(s32) = G_SITOFP [[ASHR]](s32)
; FP64: $f0 = COPY [[SITOFP]](s32)
; FP64: RetRA implicit $f0
%1:_(s32) = COPY $a0
%0:_(s16) = G_TRUNC %1(s32)
%2:_(s32) = G_SITOFP %0(s16)
$f0 = COPY %2(s32)
RetRA implicit $f0
...
---
name: i8tof32
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0
; FP32-LABEL: name: i8tof32
; FP32: liveins: $a0
; FP32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
; FP32: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
; FP32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
; FP32: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C]](s32)
; FP32: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; FP32: [[SITOFP:%[0-9]+]]:_(s32) = G_SITOFP [[ASHR]](s32)
; FP32: $f0 = COPY [[SITOFP]](s32)
; FP32: RetRA implicit $f0
; FP64-LABEL: name: i8tof32
; FP64: liveins: $a0
; FP64: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
; FP64: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
; FP64: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
; FP64: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C]](s32)
; FP64: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; FP64: [[SITOFP:%[0-9]+]]:_(s32) = G_SITOFP [[ASHR]](s32)
; FP64: $f0 = COPY [[SITOFP]](s32)
; FP64: RetRA implicit $f0
%1:_(s32) = COPY $a0
%0:_(s8) = G_TRUNC %1(s32)
%2:_(s32) = G_SITOFP %0(s8)
$f0 = COPY %2(s32)
RetRA implicit $f0
...
---
name: i64tof64
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0, $a1
; FP32-LABEL: name: i64tof64
; FP32: liveins: $a0, $a1
; FP32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
; FP32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
; FP32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
; FP32: $a0 = COPY [[COPY]](s32)
; FP32: $a1 = COPY [[COPY1]](s32)
; FP32: JAL &__floatdidf, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit $a1, implicit-def $d0
; FP32: [[COPY2:%[0-9]+]]:_(s64) = COPY $d0
; FP32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
; FP32: $d0 = COPY [[COPY2]](s64)
; FP32: RetRA implicit $d0
; FP64-LABEL: name: i64tof64
; FP64: liveins: $a0, $a1
; FP64: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
; FP64: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
; FP64: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
; FP64: $a0 = COPY [[COPY]](s32)
; FP64: $a1 = COPY [[COPY1]](s32)
; FP64: JAL &__floatdidf, csr_o32_fp64, implicit-def $ra, implicit-def $sp, implicit $a0, implicit $a1, implicit-def $d0_64
; FP64: [[COPY2:%[0-9]+]]:_(s64) = COPY $d0_64
; FP64: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
; FP64: $d0 = COPY [[COPY2]](s64)
; FP64: RetRA implicit $d0
%1:_(s32) = COPY $a0
%2:_(s32) = COPY $a1
%0:_(s64) = G_MERGE_VALUES %1(s32), %2(s32)
%3:_(s64) = G_SITOFP %0(s64)
$d0 = COPY %3(s64)
RetRA implicit $d0
...
---
name: i32tof64
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0
; FP32-LABEL: name: i32tof64
; FP32: liveins: $a0
; FP32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
; FP32: [[SITOFP:%[0-9]+]]:_(s64) = G_SITOFP [[COPY]](s32)
; FP32: $d0 = COPY [[SITOFP]](s64)
; FP32: RetRA implicit $d0
; FP64-LABEL: name: i32tof64
; FP64: liveins: $a0
; FP64: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
; FP64: [[SITOFP:%[0-9]+]]:_(s64) = G_SITOFP [[COPY]](s32)
; FP64: $d0 = COPY [[SITOFP]](s64)
; FP64: RetRA implicit $d0
%0:_(s32) = COPY $a0
%1:_(s64) = G_SITOFP %0(s32)
$d0 = COPY %1(s64)
RetRA implicit $d0
...
---
name: i16tof64
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0
; FP32-LABEL: name: i16tof64
; FP32: liveins: $a0
; FP32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
; FP32: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
; FP32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; FP32: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C]](s32)
; FP32: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; FP32: [[SITOFP:%[0-9]+]]:_(s64) = G_SITOFP [[ASHR]](s32)
; FP32: $d0 = COPY [[SITOFP]](s64)
; FP32: RetRA implicit $d0
; FP64-LABEL: name: i16tof64
; FP64: liveins: $a0
; FP64: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
; FP64: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
; FP64: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; FP64: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C]](s32)
; FP64: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; FP64: [[SITOFP:%[0-9]+]]:_(s64) = G_SITOFP [[ASHR]](s32)
; FP64: $d0 = COPY [[SITOFP]](s64)
; FP64: RetRA implicit $d0
%1:_(s32) = COPY $a0
%0:_(s16) = G_TRUNC %1(s32)
%2:_(s64) = G_SITOFP %0(s16)
$d0 = COPY %2(s64)
RetRA implicit $d0
...
---
name: i8tof64
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0
; FP32-LABEL: name: i8tof64
; FP32: liveins: $a0
; FP32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
; FP32: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
; FP32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
; FP32: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C]](s32)
; FP32: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; FP32: [[SITOFP:%[0-9]+]]:_(s64) = G_SITOFP [[ASHR]](s32)
; FP32: $d0 = COPY [[SITOFP]](s64)
; FP32: RetRA implicit $d0
; FP64-LABEL: name: i8tof64
; FP64: liveins: $a0
; FP64: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
; FP64: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
; FP64: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
; FP64: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C]](s32)
; FP64: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; FP64: [[SITOFP:%[0-9]+]]:_(s64) = G_SITOFP [[ASHR]](s32)
; FP64: $d0 = COPY [[SITOFP]](s64)
; FP64: RetRA implicit $d0
%1:_(s32) = COPY $a0
%0:_(s8) = G_TRUNC %1(s32)
%2:_(s64) = G_SITOFP %0(s8)
$d0 = COPY %2(s64)
RetRA implicit $d0
...
---
name: u64tof32
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0, $a1
; FP32-LABEL: name: u64tof32
; FP32: liveins: $a0, $a1
; FP32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
; FP32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
; FP32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
; FP32: $a0 = COPY [[COPY]](s32)
; FP32: $a1 = COPY [[COPY1]](s32)
; FP32: JAL &__floatundisf, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit $a1, implicit-def $f0
; FP32: [[COPY2:%[0-9]+]]:_(s32) = COPY $f0
; FP32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
; FP32: $f0 = COPY [[COPY2]](s32)
; FP32: RetRA implicit $f0
; FP64-LABEL: name: u64tof32
; FP64: liveins: $a0, $a1
; FP64: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
; FP64: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
; FP64: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
; FP64: $a0 = COPY [[COPY]](s32)
; FP64: $a1 = COPY [[COPY1]](s32)
; FP64: JAL &__floatundisf, csr_o32_fp64, implicit-def $ra, implicit-def $sp, implicit $a0, implicit $a1, implicit-def $f0
; FP64: [[COPY2:%[0-9]+]]:_(s32) = COPY $f0
; FP64: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
; FP64: $f0 = COPY [[COPY2]](s32)
; FP64: RetRA implicit $f0
%1:_(s32) = COPY $a0
%2:_(s32) = COPY $a1
%0:_(s64) = G_MERGE_VALUES %1(s32), %2(s32)
%3:_(s32) = G_UITOFP %0(s64)
$f0 = COPY %3(s32)
RetRA implicit $f0
...
---
name: u32tof32
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0
; FP32-LABEL: name: u32tof32
; FP32: liveins: $a0
; FP32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
; FP32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1127219200
; FP32: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[C]](s32)
; FP32: [[C1:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x4330000000000000
; FP32: [[FSUB:%[0-9]+]]:_(s64) = G_FSUB [[MV]], [[C1]]
; FP32: [[FPTRUNC:%[0-9]+]]:_(s32) = G_FPTRUNC [[FSUB]](s64)
; FP32: $f0 = COPY [[FPTRUNC]](s32)
; FP32: RetRA implicit $f0
; FP64-LABEL: name: u32tof32
; FP64: liveins: $a0
; FP64: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
; FP64: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1127219200
; FP64: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[C]](s32)
; FP64: [[C1:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x4330000000000000
; FP64: [[FSUB:%[0-9]+]]:_(s64) = G_FSUB [[MV]], [[C1]]
; FP64: [[FPTRUNC:%[0-9]+]]:_(s32) = G_FPTRUNC [[FSUB]](s64)
; FP64: $f0 = COPY [[FPTRUNC]](s32)
; FP64: RetRA implicit $f0
%0:_(s32) = COPY $a0
%1:_(s32) = G_UITOFP %0(s32)
$f0 = COPY %1(s32)
RetRA implicit $f0
...
---
name: u16tof32
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0
; FP32-LABEL: name: u16tof32
; FP32: liveins: $a0
; FP32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
; FP32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
; FP32: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
; FP32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]
; FP32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1127219200
; FP32: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[AND]](s32), [[C1]](s32)
; FP32: [[C2:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x4330000000000000
; FP32: [[FSUB:%[0-9]+]]:_(s64) = G_FSUB [[MV]], [[C2]]
; FP32: [[FPTRUNC:%[0-9]+]]:_(s32) = G_FPTRUNC [[FSUB]](s64)
; FP32: $f0 = COPY [[FPTRUNC]](s32)
; FP32: RetRA implicit $f0
; FP64-LABEL: name: u16tof32
; FP64: liveins: $a0
; FP64: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
; FP64: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
; FP64: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
; FP64: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]
; FP64: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1127219200
; FP64: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[AND]](s32), [[C1]](s32)
; FP64: [[C2:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x4330000000000000
; FP64: [[FSUB:%[0-9]+]]:_(s64) = G_FSUB [[MV]], [[C2]]
; FP64: [[FPTRUNC:%[0-9]+]]:_(s32) = G_FPTRUNC [[FSUB]](s64)
; FP64: $f0 = COPY [[FPTRUNC]](s32)
; FP64: RetRA implicit $f0
%1:_(s32) = COPY $a0
%0:_(s16) = G_TRUNC %1(s32)
%2:_(s32) = G_UITOFP %0(s16)
$f0 = COPY %2(s32)
RetRA implicit $f0
...
---
name: u8tof32
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0
; FP32-LABEL: name: u8tof32
; FP32: liveins: $a0
; FP32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
; FP32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
; FP32: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
; FP32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]
; FP32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1127219200
; FP32: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[AND]](s32), [[C1]](s32)
; FP32: [[C2:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x4330000000000000
; FP32: [[FSUB:%[0-9]+]]:_(s64) = G_FSUB [[MV]], [[C2]]
; FP32: [[FPTRUNC:%[0-9]+]]:_(s32) = G_FPTRUNC [[FSUB]](s64)
; FP32: $f0 = COPY [[FPTRUNC]](s32)
; FP32: RetRA implicit $f0
; FP64-LABEL: name: u8tof32
; FP64: liveins: $a0
; FP64: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
; FP64: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
; FP64: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
; FP64: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]
; FP64: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1127219200
; FP64: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[AND]](s32), [[C1]](s32)
; FP64: [[C2:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x4330000000000000
; FP64: [[FSUB:%[0-9]+]]:_(s64) = G_FSUB [[MV]], [[C2]]
; FP64: [[FPTRUNC:%[0-9]+]]:_(s32) = G_FPTRUNC [[FSUB]](s64)
; FP64: $f0 = COPY [[FPTRUNC]](s32)
; FP64: RetRA implicit $f0
%1:_(s32) = COPY $a0
%0:_(s8) = G_TRUNC %1(s32)
%2:_(s32) = G_UITOFP %0(s8)
$f0 = COPY %2(s32)
RetRA implicit $f0
...
---
name: u64tof64
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0, $a1
; FP32-LABEL: name: u64tof64
; FP32: liveins: $a0, $a1
; FP32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
; FP32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
; FP32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
; FP32: $a0 = COPY [[COPY]](s32)
; FP32: $a1 = COPY [[COPY1]](s32)
; FP32: JAL &__floatundidf, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit $a1, implicit-def $d0
; FP32: [[COPY2:%[0-9]+]]:_(s64) = COPY $d0
; FP32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
; FP32: $d0 = COPY [[COPY2]](s64)
; FP32: RetRA implicit $d0
; FP64-LABEL: name: u64tof64
; FP64: liveins: $a0, $a1
; FP64: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
; FP64: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
; FP64: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
; FP64: $a0 = COPY [[COPY]](s32)
; FP64: $a1 = COPY [[COPY1]](s32)
; FP64: JAL &__floatundidf, csr_o32_fp64, implicit-def $ra, implicit-def $sp, implicit $a0, implicit $a1, implicit-def $d0_64
; FP64: [[COPY2:%[0-9]+]]:_(s64) = COPY $d0_64
; FP64: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
; FP64: $d0 = COPY [[COPY2]](s64)
; FP64: RetRA implicit $d0
%1:_(s32) = COPY $a0
%2:_(s32) = COPY $a1
%0:_(s64) = G_MERGE_VALUES %1(s32), %2(s32)
%3:_(s64) = G_UITOFP %0(s64)
$d0 = COPY %3(s64)
RetRA implicit $d0
...
---
name: u32tof64
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0
; FP32-LABEL: name: u32tof64
; FP32: liveins: $a0
; FP32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
; FP32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1127219200
; FP32: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[C]](s32)
; FP32: [[C1:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x4330000000000000
; FP32: [[FSUB:%[0-9]+]]:_(s64) = G_FSUB [[MV]], [[C1]]
; FP32: $d0 = COPY [[FSUB]](s64)
; FP32: RetRA implicit $d0
; FP64-LABEL: name: u32tof64
; FP64: liveins: $a0
; FP64: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
; FP64: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1127219200
; FP64: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[C]](s32)
; FP64: [[C1:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x4330000000000000
; FP64: [[FSUB:%[0-9]+]]:_(s64) = G_FSUB [[MV]], [[C1]]
; FP64: $d0 = COPY [[FSUB]](s64)
; FP64: RetRA implicit $d0
%0:_(s32) = COPY $a0
%1:_(s64) = G_UITOFP %0(s32)
$d0 = COPY %1(s64)
RetRA implicit $d0
...
---
name: u16tof64
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0
; FP32-LABEL: name: u16tof64
; FP32: liveins: $a0
; FP32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
; FP32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
; FP32: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
; FP32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]
; FP32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1127219200
; FP32: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[AND]](s32), [[C1]](s32)
; FP32: [[C2:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x4330000000000000
; FP32: [[FSUB:%[0-9]+]]:_(s64) = G_FSUB [[MV]], [[C2]]
; FP32: $d0 = COPY [[FSUB]](s64)
; FP32: RetRA implicit $d0
; FP64-LABEL: name: u16tof64
; FP64: liveins: $a0
; FP64: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
; FP64: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
; FP64: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
; FP64: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]
; FP64: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1127219200
; FP64: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[AND]](s32), [[C1]](s32)
; FP64: [[C2:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x4330000000000000
; FP64: [[FSUB:%[0-9]+]]:_(s64) = G_FSUB [[MV]], [[C2]]
; FP64: $d0 = COPY [[FSUB]](s64)
; FP64: RetRA implicit $d0
%1:_(s32) = COPY $a0
%0:_(s16) = G_TRUNC %1(s32)
%2:_(s64) = G_UITOFP %0(s16)
$d0 = COPY %2(s64)
RetRA implicit $d0
...
---
name: u8tof64
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0
; FP32-LABEL: name: u8tof64
; FP32: liveins: $a0
; FP32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
; FP32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
; FP32: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
; FP32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]
; FP32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1127219200
; FP32: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[AND]](s32), [[C1]](s32)
; FP32: [[C2:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x4330000000000000
; FP32: [[FSUB:%[0-9]+]]:_(s64) = G_FSUB [[MV]], [[C2]]
; FP32: $d0 = COPY [[FSUB]](s64)
; FP32: RetRA implicit $d0
; FP64-LABEL: name: u8tof64
; FP64: liveins: $a0
; FP64: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
; FP64: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
; FP64: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
; FP64: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]
; FP64: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1127219200
; FP64: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[AND]](s32), [[C1]](s32)
; FP64: [[C2:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x4330000000000000
; FP64: [[FSUB:%[0-9]+]]:_(s64) = G_FSUB [[MV]], [[C2]]
; FP64: $d0 = COPY [[FSUB]](s64)
; FP64: RetRA implicit $d0
%1:_(s32) = COPY $a0
%0:_(s8) = G_TRUNC %1(s32)
%2:_(s64) = G_UITOFP %0(s8)
$d0 = COPY %2(s64)
RetRA implicit $d0
...
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