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llvm-for-llvmta/test/CodeGen/Mips/GlobalISel/legalizer/fptosi_and_fptoui.mir

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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=FP32
# RUN: llc -O0 -mtriple=mipsel-linux-gnu -mattr=+fp64,+mips32r2 -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=FP64
--- |
define void @f32toi64() {entry: ret void}
define void @f32toi32() {entry: ret void}
define void @f32toi16() {entry: ret void}
define void @f32toi8() {entry: ret void}
define void @f64toi64() {entry: ret void}
define void @f64toi32() {entry: ret void}
define void @f64toi16() {entry: ret void}
define void @f64toi8() {entry: ret void}
define void @f32tou64() {entry: ret void}
define void @f32tou32() {entry: ret void}
define void @f32tou16() {entry: ret void}
define void @f32tou8() {entry: ret void}
define void @f64tou64() {entry: ret void}
define void @f64tou32() {entry: ret void}
define void @f64tou16() {entry: ret void}
define void @f64tou8() {entry: ret void}
...
---
name: f32toi64
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $f12
; FP32-LABEL: name: f32toi64
; FP32: liveins: $f12
; FP32: [[COPY:%[0-9]+]]:_(s32) = COPY $f12
; FP32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
; FP32: $f12 = COPY [[COPY]](s32)
; FP32: JAL &__fixsfdi, csr_o32, implicit-def $ra, implicit-def $sp, implicit $f12, implicit-def $v0, implicit-def $v1
; FP32: [[COPY1:%[0-9]+]]:_(s32) = COPY $v0
; FP32: [[COPY2:%[0-9]+]]:_(s32) = COPY $v1
; FP32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
; FP32: $v0 = COPY [[COPY1]](s32)
; FP32: $v1 = COPY [[COPY2]](s32)
; FP32: RetRA implicit $v0, implicit $v1
; FP64-LABEL: name: f32toi64
; FP64: liveins: $f12
; FP64: [[COPY:%[0-9]+]]:_(s32) = COPY $f12
; FP64: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
; FP64: $f12 = COPY [[COPY]](s32)
; FP64: JAL &__fixsfdi, csr_o32_fp64, implicit-def $ra, implicit-def $sp, implicit $f12, implicit-def $v0, implicit-def $v1
; FP64: [[COPY1:%[0-9]+]]:_(s32) = COPY $v0
; FP64: [[COPY2:%[0-9]+]]:_(s32) = COPY $v1
; FP64: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
; FP64: $v0 = COPY [[COPY1]](s32)
; FP64: $v1 = COPY [[COPY2]](s32)
; FP64: RetRA implicit $v0, implicit $v1
%0:_(s32) = COPY $f12
%1:_(s64) = G_FPTOSI %0(s32)
%2:_(s32), %3:_(s32) = G_UNMERGE_VALUES %1(s64)
$v0 = COPY %2(s32)
$v1 = COPY %3(s32)
RetRA implicit $v0, implicit $v1
...
---
name: f32toi32
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $f12
; FP32-LABEL: name: f32toi32
; FP32: liveins: $f12
; FP32: [[COPY:%[0-9]+]]:_(s32) = COPY $f12
; FP32: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s32)
; FP32: $v0 = COPY [[FPTOSI]](s32)
; FP32: RetRA implicit $v0
; FP64-LABEL: name: f32toi32
; FP64: liveins: $f12
; FP64: [[COPY:%[0-9]+]]:_(s32) = COPY $f12
; FP64: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s32)
; FP64: $v0 = COPY [[FPTOSI]](s32)
; FP64: RetRA implicit $v0
%0:_(s32) = COPY $f12
%1:_(s32) = G_FPTOSI %0(s32)
$v0 = COPY %1(s32)
RetRA implicit $v0
...
---
name: f32toi16
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $f12
; FP32-LABEL: name: f32toi16
; FP32: liveins: $f12
; FP32: [[COPY:%[0-9]+]]:_(s32) = COPY $f12
; FP32: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s32)
; FP32: [[COPY1:%[0-9]+]]:_(s32) = COPY [[FPTOSI]](s32)
; FP32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; FP32: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C]](s32)
; FP32: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; FP32: $v0 = COPY [[ASHR]](s32)
; FP32: RetRA implicit $v0
; FP64-LABEL: name: f32toi16
; FP64: liveins: $f12
; FP64: [[COPY:%[0-9]+]]:_(s32) = COPY $f12
; FP64: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s32)
; FP64: [[COPY1:%[0-9]+]]:_(s32) = COPY [[FPTOSI]](s32)
; FP64: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; FP64: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C]](s32)
; FP64: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; FP64: $v0 = COPY [[ASHR]](s32)
; FP64: RetRA implicit $v0
%0:_(s32) = COPY $f12
%1:_(s16) = G_FPTOSI %0(s32)
%2:_(s32) = G_SEXT %1(s16)
$v0 = COPY %2(s32)
RetRA implicit $v0
...
---
name: f32toi8
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $f12
; FP32-LABEL: name: f32toi8
; FP32: liveins: $f12
; FP32: [[COPY:%[0-9]+]]:_(s32) = COPY $f12
; FP32: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s32)
; FP32: [[COPY1:%[0-9]+]]:_(s32) = COPY [[FPTOSI]](s32)
; FP32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
; FP32: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C]](s32)
; FP32: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; FP32: $v0 = COPY [[ASHR]](s32)
; FP32: RetRA implicit $v0
; FP64-LABEL: name: f32toi8
; FP64: liveins: $f12
; FP64: [[COPY:%[0-9]+]]:_(s32) = COPY $f12
; FP64: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s32)
; FP64: [[COPY1:%[0-9]+]]:_(s32) = COPY [[FPTOSI]](s32)
; FP64: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
; FP64: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C]](s32)
; FP64: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; FP64: $v0 = COPY [[ASHR]](s32)
; FP64: RetRA implicit $v0
%0:_(s32) = COPY $f12
%1:_(s8) = G_FPTOSI %0(s32)
%2:_(s32) = G_SEXT %1(s8)
$v0 = COPY %2(s32)
RetRA implicit $v0
...
---
name: f64toi64
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $d6
; FP32-LABEL: name: f64toi64
; FP32: liveins: $d6
; FP32: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
; FP32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
; FP32: $d6 = COPY [[COPY]](s64)
; FP32: JAL &__fixdfdi, csr_o32, implicit-def $ra, implicit-def $sp, implicit $d6, implicit-def $v0, implicit-def $v1
; FP32: [[COPY1:%[0-9]+]]:_(s32) = COPY $v0
; FP32: [[COPY2:%[0-9]+]]:_(s32) = COPY $v1
; FP32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
; FP32: $v0 = COPY [[COPY1]](s32)
; FP32: $v1 = COPY [[COPY2]](s32)
; FP32: RetRA implicit $v0, implicit $v1
; FP64-LABEL: name: f64toi64
; FP64: liveins: $d6
; FP64: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
; FP64: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
; FP64: $d12_64 = COPY [[COPY]](s64)
; FP64: JAL &__fixdfdi, csr_o32_fp64, implicit-def $ra, implicit-def $sp, implicit $d12_64, implicit-def $v0, implicit-def $v1
; FP64: [[COPY1:%[0-9]+]]:_(s32) = COPY $v0
; FP64: [[COPY2:%[0-9]+]]:_(s32) = COPY $v1
; FP64: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
; FP64: $v0 = COPY [[COPY1]](s32)
; FP64: $v1 = COPY [[COPY2]](s32)
; FP64: RetRA implicit $v0, implicit $v1
%0:_(s64) = COPY $d6
%1:_(s64) = G_FPTOSI %0(s64)
%2:_(s32), %3:_(s32) = G_UNMERGE_VALUES %1(s64)
$v0 = COPY %2(s32)
$v1 = COPY %3(s32)
RetRA implicit $v0, implicit $v1
...
---
name: f64toi32
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $d6
; FP32-LABEL: name: f64toi32
; FP32: liveins: $d6
; FP32: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
; FP32: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s64)
; FP32: $v0 = COPY [[FPTOSI]](s32)
; FP32: RetRA implicit $v0
; FP64-LABEL: name: f64toi32
; FP64: liveins: $d6
; FP64: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
; FP64: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s64)
; FP64: $v0 = COPY [[FPTOSI]](s32)
; FP64: RetRA implicit $v0
%0:_(s64) = COPY $d6
%1:_(s32) = G_FPTOSI %0(s64)
$v0 = COPY %1(s32)
RetRA implicit $v0
...
---
name: f64toi16
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $d6
; FP32-LABEL: name: f64toi16
; FP32: liveins: $d6
; FP32: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
; FP32: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s64)
; FP32: [[COPY1:%[0-9]+]]:_(s32) = COPY [[FPTOSI]](s32)
; FP32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; FP32: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C]](s32)
; FP32: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; FP32: $v0 = COPY [[ASHR]](s32)
; FP32: RetRA implicit $v0
; FP64-LABEL: name: f64toi16
; FP64: liveins: $d6
; FP64: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
; FP64: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s64)
; FP64: [[COPY1:%[0-9]+]]:_(s32) = COPY [[FPTOSI]](s32)
; FP64: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; FP64: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C]](s32)
; FP64: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; FP64: $v0 = COPY [[ASHR]](s32)
; FP64: RetRA implicit $v0
%0:_(s64) = COPY $d6
%1:_(s16) = G_FPTOSI %0(s64)
%2:_(s32) = G_SEXT %1(s16)
$v0 = COPY %2(s32)
RetRA implicit $v0
...
---
name: f64toi8
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $d6
; FP32-LABEL: name: f64toi8
; FP32: liveins: $d6
; FP32: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
; FP32: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s64)
; FP32: [[COPY1:%[0-9]+]]:_(s32) = COPY [[FPTOSI]](s32)
; FP32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
; FP32: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C]](s32)
; FP32: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; FP32: $v0 = COPY [[ASHR]](s32)
; FP32: RetRA implicit $v0
; FP64-LABEL: name: f64toi8
; FP64: liveins: $d6
; FP64: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
; FP64: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s64)
; FP64: [[COPY1:%[0-9]+]]:_(s32) = COPY [[FPTOSI]](s32)
; FP64: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
; FP64: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C]](s32)
; FP64: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; FP64: $v0 = COPY [[ASHR]](s32)
; FP64: RetRA implicit $v0
%0:_(s64) = COPY $d6
%1:_(s8) = G_FPTOSI %0(s64)
%2:_(s32) = G_SEXT %1(s8)
$v0 = COPY %2(s32)
RetRA implicit $v0
...
---
name: f32tou64
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $f12
; FP32-LABEL: name: f32tou64
; FP32: liveins: $f12
; FP32: [[COPY:%[0-9]+]]:_(s32) = COPY $f12
; FP32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
; FP32: $f12 = COPY [[COPY]](s32)
; FP32: JAL &__fixunssfdi, csr_o32, implicit-def $ra, implicit-def $sp, implicit $f12, implicit-def $v0, implicit-def $v1
; FP32: [[COPY1:%[0-9]+]]:_(s32) = COPY $v0
; FP32: [[COPY2:%[0-9]+]]:_(s32) = COPY $v1
; FP32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
; FP32: $v0 = COPY [[COPY1]](s32)
; FP32: $v1 = COPY [[COPY2]](s32)
; FP32: RetRA implicit $v0, implicit $v1
; FP64-LABEL: name: f32tou64
; FP64: liveins: $f12
; FP64: [[COPY:%[0-9]+]]:_(s32) = COPY $f12
; FP64: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
; FP64: $f12 = COPY [[COPY]](s32)
; FP64: JAL &__fixunssfdi, csr_o32_fp64, implicit-def $ra, implicit-def $sp, implicit $f12, implicit-def $v0, implicit-def $v1
; FP64: [[COPY1:%[0-9]+]]:_(s32) = COPY $v0
; FP64: [[COPY2:%[0-9]+]]:_(s32) = COPY $v1
; FP64: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
; FP64: $v0 = COPY [[COPY1]](s32)
; FP64: $v1 = COPY [[COPY2]](s32)
; FP64: RetRA implicit $v0, implicit $v1
%0:_(s32) = COPY $f12
%1:_(s64) = G_FPTOUI %0(s32)
%2:_(s32), %3:_(s32) = G_UNMERGE_VALUES %1(s64)
$v0 = COPY %2(s32)
$v1 = COPY %3(s32)
RetRA implicit $v0, implicit $v1
...
---
name: f32tou32
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $f12
; FP32-LABEL: name: f32tou32
; FP32: liveins: $f12
; FP32: [[COPY:%[0-9]+]]:_(s32) = COPY $f12
; FP32: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s32)
; FP32: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 0x41E0000000000000
; FP32: [[FSUB:%[0-9]+]]:_(s32) = G_FSUB [[COPY]], [[C]]
; FP32: [[FPTOSI1:%[0-9]+]]:_(s32) = G_FPTOSI [[FSUB]](s32)
; FP32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
; FP32: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[FPTOSI1]], [[C1]]
; FP32: [[FCMP:%[0-9]+]]:_(s32) = G_FCMP floatpred(ult), [[COPY]](s32), [[C]]
; FP32: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; FP32: [[COPY1:%[0-9]+]]:_(s32) = COPY [[FCMP]](s32)
; FP32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C2]]
; FP32: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[FPTOSI]], [[XOR]]
; FP32: $v0 = COPY [[SELECT]](s32)
; FP32: RetRA implicit $v0
; FP64-LABEL: name: f32tou32
; FP64: liveins: $f12
; FP64: [[COPY:%[0-9]+]]:_(s32) = COPY $f12
; FP64: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s32)
; FP64: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 0x41E0000000000000
; FP64: [[FSUB:%[0-9]+]]:_(s32) = G_FSUB [[COPY]], [[C]]
; FP64: [[FPTOSI1:%[0-9]+]]:_(s32) = G_FPTOSI [[FSUB]](s32)
; FP64: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
; FP64: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[FPTOSI1]], [[C1]]
; FP64: [[FCMP:%[0-9]+]]:_(s32) = G_FCMP floatpred(ult), [[COPY]](s32), [[C]]
; FP64: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; FP64: [[COPY1:%[0-9]+]]:_(s32) = COPY [[FCMP]](s32)
; FP64: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C2]]
; FP64: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[FPTOSI]], [[XOR]]
; FP64: $v0 = COPY [[SELECT]](s32)
; FP64: RetRA implicit $v0
%0:_(s32) = COPY $f12
%1:_(s32) = G_FPTOUI %0(s32)
$v0 = COPY %1(s32)
RetRA implicit $v0
...
---
name: f32tou16
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $f12
; FP32-LABEL: name: f32tou16
; FP32: liveins: $f12
; FP32: [[COPY:%[0-9]+]]:_(s32) = COPY $f12
; FP32: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s32)
; FP32: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 0x41E0000000000000
; FP32: [[FSUB:%[0-9]+]]:_(s32) = G_FSUB [[COPY]], [[C]]
; FP32: [[FPTOSI1:%[0-9]+]]:_(s32) = G_FPTOSI [[FSUB]](s32)
; FP32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
; FP32: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[FPTOSI1]], [[C1]]
; FP32: [[FCMP:%[0-9]+]]:_(s32) = G_FCMP floatpred(ult), [[COPY]](s32), [[C]]
; FP32: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; FP32: [[COPY1:%[0-9]+]]:_(s32) = COPY [[FCMP]](s32)
; FP32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C2]]
; FP32: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[FPTOSI]], [[XOR]]
; FP32: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
; FP32: [[COPY2:%[0-9]+]]:_(s32) = COPY [[SELECT]](s32)
; FP32: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]]
; FP32: $v0 = COPY [[AND1]](s32)
; FP32: RetRA implicit $v0
; FP64-LABEL: name: f32tou16
; FP64: liveins: $f12
; FP64: [[COPY:%[0-9]+]]:_(s32) = COPY $f12
; FP64: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s32)
; FP64: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 0x41E0000000000000
; FP64: [[FSUB:%[0-9]+]]:_(s32) = G_FSUB [[COPY]], [[C]]
; FP64: [[FPTOSI1:%[0-9]+]]:_(s32) = G_FPTOSI [[FSUB]](s32)
; FP64: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
; FP64: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[FPTOSI1]], [[C1]]
; FP64: [[FCMP:%[0-9]+]]:_(s32) = G_FCMP floatpred(ult), [[COPY]](s32), [[C]]
; FP64: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; FP64: [[COPY1:%[0-9]+]]:_(s32) = COPY [[FCMP]](s32)
; FP64: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C2]]
; FP64: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[FPTOSI]], [[XOR]]
; FP64: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
; FP64: [[COPY2:%[0-9]+]]:_(s32) = COPY [[SELECT]](s32)
; FP64: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]]
; FP64: $v0 = COPY [[AND1]](s32)
; FP64: RetRA implicit $v0
%0:_(s32) = COPY $f12
%1:_(s16) = G_FPTOUI %0(s32)
%2:_(s32) = G_ZEXT %1(s16)
$v0 = COPY %2(s32)
RetRA implicit $v0
...
---
name: f32tou8
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $f12
; FP32-LABEL: name: f32tou8
; FP32: liveins: $f12
; FP32: [[COPY:%[0-9]+]]:_(s32) = COPY $f12
; FP32: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s32)
; FP32: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 0x41E0000000000000
; FP32: [[FSUB:%[0-9]+]]:_(s32) = G_FSUB [[COPY]], [[C]]
; FP32: [[FPTOSI1:%[0-9]+]]:_(s32) = G_FPTOSI [[FSUB]](s32)
; FP32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
; FP32: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[FPTOSI1]], [[C1]]
; FP32: [[FCMP:%[0-9]+]]:_(s32) = G_FCMP floatpred(ult), [[COPY]](s32), [[C]]
; FP32: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; FP32: [[COPY1:%[0-9]+]]:_(s32) = COPY [[FCMP]](s32)
; FP32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C2]]
; FP32: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[FPTOSI]], [[XOR]]
; FP32: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
; FP32: [[COPY2:%[0-9]+]]:_(s32) = COPY [[SELECT]](s32)
; FP32: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]]
; FP32: $v0 = COPY [[AND1]](s32)
; FP32: RetRA implicit $v0
; FP64-LABEL: name: f32tou8
; FP64: liveins: $f12
; FP64: [[COPY:%[0-9]+]]:_(s32) = COPY $f12
; FP64: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s32)
; FP64: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 0x41E0000000000000
; FP64: [[FSUB:%[0-9]+]]:_(s32) = G_FSUB [[COPY]], [[C]]
; FP64: [[FPTOSI1:%[0-9]+]]:_(s32) = G_FPTOSI [[FSUB]](s32)
; FP64: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
; FP64: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[FPTOSI1]], [[C1]]
; FP64: [[FCMP:%[0-9]+]]:_(s32) = G_FCMP floatpred(ult), [[COPY]](s32), [[C]]
; FP64: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; FP64: [[COPY1:%[0-9]+]]:_(s32) = COPY [[FCMP]](s32)
; FP64: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C2]]
; FP64: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[FPTOSI]], [[XOR]]
; FP64: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
; FP64: [[COPY2:%[0-9]+]]:_(s32) = COPY [[SELECT]](s32)
; FP64: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]]
; FP64: $v0 = COPY [[AND1]](s32)
; FP64: RetRA implicit $v0
%0:_(s32) = COPY $f12
%1:_(s8) = G_FPTOUI %0(s32)
%2:_(s32) = G_ZEXT %1(s8)
$v0 = COPY %2(s32)
RetRA implicit $v0
...
---
name: f64tou64
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $d6
; FP32-LABEL: name: f64tou64
; FP32: liveins: $d6
; FP32: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
; FP32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
; FP32: $d6 = COPY [[COPY]](s64)
; FP32: JAL &__fixunsdfdi, csr_o32, implicit-def $ra, implicit-def $sp, implicit $d6, implicit-def $v0, implicit-def $v1
; FP32: [[COPY1:%[0-9]+]]:_(s32) = COPY $v0
; FP32: [[COPY2:%[0-9]+]]:_(s32) = COPY $v1
; FP32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
; FP32: $v0 = COPY [[COPY1]](s32)
; FP32: $v1 = COPY [[COPY2]](s32)
; FP32: RetRA implicit $v0, implicit $v1
; FP64-LABEL: name: f64tou64
; FP64: liveins: $d6
; FP64: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
; FP64: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
; FP64: $d12_64 = COPY [[COPY]](s64)
; FP64: JAL &__fixunsdfdi, csr_o32_fp64, implicit-def $ra, implicit-def $sp, implicit $d12_64, implicit-def $v0, implicit-def $v1
; FP64: [[COPY1:%[0-9]+]]:_(s32) = COPY $v0
; FP64: [[COPY2:%[0-9]+]]:_(s32) = COPY $v1
; FP64: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
; FP64: $v0 = COPY [[COPY1]](s32)
; FP64: $v1 = COPY [[COPY2]](s32)
; FP64: RetRA implicit $v0, implicit $v1
%0:_(s64) = COPY $d6
%1:_(s64) = G_FPTOUI %0(s64)
%2:_(s32), %3:_(s32) = G_UNMERGE_VALUES %1(s64)
$v0 = COPY %2(s32)
$v1 = COPY %3(s32)
RetRA implicit $v0, implicit $v1
...
---
name: f64tou32
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $d6
; FP32-LABEL: name: f64tou32
; FP32: liveins: $d6
; FP32: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
; FP32: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s64)
; FP32: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x41E0000000000000
; FP32: [[FSUB:%[0-9]+]]:_(s64) = G_FSUB [[COPY]], [[C]]
; FP32: [[FPTOSI1:%[0-9]+]]:_(s32) = G_FPTOSI [[FSUB]](s64)
; FP32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
; FP32: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[FPTOSI1]], [[C1]]
; FP32: [[FCMP:%[0-9]+]]:_(s32) = G_FCMP floatpred(ult), [[COPY]](s64), [[C]]
; FP32: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; FP32: [[COPY1:%[0-9]+]]:_(s32) = COPY [[FCMP]](s32)
; FP32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C2]]
; FP32: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[FPTOSI]], [[XOR]]
; FP32: $v0 = COPY [[SELECT]](s32)
; FP32: RetRA implicit $v0
; FP64-LABEL: name: f64tou32
; FP64: liveins: $d6
; FP64: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
; FP64: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s64)
; FP64: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x41E0000000000000
; FP64: [[FSUB:%[0-9]+]]:_(s64) = G_FSUB [[COPY]], [[C]]
; FP64: [[FPTOSI1:%[0-9]+]]:_(s32) = G_FPTOSI [[FSUB]](s64)
; FP64: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
; FP64: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[FPTOSI1]], [[C1]]
; FP64: [[FCMP:%[0-9]+]]:_(s32) = G_FCMP floatpred(ult), [[COPY]](s64), [[C]]
; FP64: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; FP64: [[COPY1:%[0-9]+]]:_(s32) = COPY [[FCMP]](s32)
; FP64: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C2]]
; FP64: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[FPTOSI]], [[XOR]]
; FP64: $v0 = COPY [[SELECT]](s32)
; FP64: RetRA implicit $v0
%0:_(s64) = COPY $d6
%1:_(s32) = G_FPTOUI %0(s64)
$v0 = COPY %1(s32)
RetRA implicit $v0
...
---
name: f64tou16
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $d6
; FP32-LABEL: name: f64tou16
; FP32: liveins: $d6
; FP32: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
; FP32: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s64)
; FP32: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x41E0000000000000
; FP32: [[FSUB:%[0-9]+]]:_(s64) = G_FSUB [[COPY]], [[C]]
; FP32: [[FPTOSI1:%[0-9]+]]:_(s32) = G_FPTOSI [[FSUB]](s64)
; FP32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
; FP32: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[FPTOSI1]], [[C1]]
; FP32: [[FCMP:%[0-9]+]]:_(s32) = G_FCMP floatpred(ult), [[COPY]](s64), [[C]]
; FP32: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; FP32: [[COPY1:%[0-9]+]]:_(s32) = COPY [[FCMP]](s32)
; FP32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C2]]
; FP32: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[FPTOSI]], [[XOR]]
; FP32: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
; FP32: [[COPY2:%[0-9]+]]:_(s32) = COPY [[SELECT]](s32)
; FP32: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]]
; FP32: $v0 = COPY [[AND1]](s32)
; FP32: RetRA implicit $v0
; FP64-LABEL: name: f64tou16
; FP64: liveins: $d6
; FP64: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
; FP64: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s64)
; FP64: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x41E0000000000000
; FP64: [[FSUB:%[0-9]+]]:_(s64) = G_FSUB [[COPY]], [[C]]
; FP64: [[FPTOSI1:%[0-9]+]]:_(s32) = G_FPTOSI [[FSUB]](s64)
; FP64: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
; FP64: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[FPTOSI1]], [[C1]]
; FP64: [[FCMP:%[0-9]+]]:_(s32) = G_FCMP floatpred(ult), [[COPY]](s64), [[C]]
; FP64: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; FP64: [[COPY1:%[0-9]+]]:_(s32) = COPY [[FCMP]](s32)
; FP64: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C2]]
; FP64: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[FPTOSI]], [[XOR]]
; FP64: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
; FP64: [[COPY2:%[0-9]+]]:_(s32) = COPY [[SELECT]](s32)
; FP64: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]]
; FP64: $v0 = COPY [[AND1]](s32)
; FP64: RetRA implicit $v0
%0:_(s64) = COPY $d6
%1:_(s16) = G_FPTOUI %0(s64)
%2:_(s32) = G_ZEXT %1(s16)
$v0 = COPY %2(s32)
RetRA implicit $v0
...
---
name: f64tou8
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $d6
; FP32-LABEL: name: f64tou8
; FP32: liveins: $d6
; FP32: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
; FP32: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s64)
; FP32: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x41E0000000000000
; FP32: [[FSUB:%[0-9]+]]:_(s64) = G_FSUB [[COPY]], [[C]]
; FP32: [[FPTOSI1:%[0-9]+]]:_(s32) = G_FPTOSI [[FSUB]](s64)
; FP32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
; FP32: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[FPTOSI1]], [[C1]]
; FP32: [[FCMP:%[0-9]+]]:_(s32) = G_FCMP floatpred(ult), [[COPY]](s64), [[C]]
; FP32: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; FP32: [[COPY1:%[0-9]+]]:_(s32) = COPY [[FCMP]](s32)
; FP32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C2]]
; FP32: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[FPTOSI]], [[XOR]]
; FP32: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
; FP32: [[COPY2:%[0-9]+]]:_(s32) = COPY [[SELECT]](s32)
; FP32: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]]
; FP32: $v0 = COPY [[AND1]](s32)
; FP32: RetRA implicit $v0
; FP64-LABEL: name: f64tou8
; FP64: liveins: $d6
; FP64: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
; FP64: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s64)
; FP64: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x41E0000000000000
; FP64: [[FSUB:%[0-9]+]]:_(s64) = G_FSUB [[COPY]], [[C]]
; FP64: [[FPTOSI1:%[0-9]+]]:_(s32) = G_FPTOSI [[FSUB]](s64)
; FP64: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
; FP64: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[FPTOSI1]], [[C1]]
; FP64: [[FCMP:%[0-9]+]]:_(s32) = G_FCMP floatpred(ult), [[COPY]](s64), [[C]]
; FP64: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; FP64: [[COPY1:%[0-9]+]]:_(s32) = COPY [[FCMP]](s32)
; FP64: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C2]]
; FP64: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[FPTOSI]], [[XOR]]
; FP64: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
; FP64: [[COPY2:%[0-9]+]]:_(s32) = COPY [[SELECT]](s32)
; FP64: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]]
; FP64: $v0 = COPY [[AND1]](s32)
; FP64: RetRA implicit $v0
%0:_(s64) = COPY $d6
%1:_(s8) = G_FPTOUI %0(s64)
%2:_(s32) = G_ZEXT %1(s8)
$v0 = COPY %2(s32)
RetRA implicit $v0
...
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