126 lines
4.6 KiB
LLVM
126 lines
4.6 KiB
LLVM
; RUN: llc -march=hexagon -O2 < %s
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; REQUIRES: asserts
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target triple = "hexagon-unknown--elf"
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%struct.cpumask = type { [1 x i32] }
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%struct.load_weight = type { i32, i32 }
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@sysctl_sched_latency = global i32 6000000, align 4
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@normalized_sysctl_sched_latency = global i32 6000000, align 4
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@sysctl_sched_tunable_scaling = global i8 1, align 1
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@sysctl_sched_min_granularity = global i32 750000, align 4
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@normalized_sysctl_sched_min_granularity = global i32 750000, align 4
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@sysctl_sched_wakeup_granularity = global i32 1000000, align 4
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@normalized_sysctl_sched_wakeup_granularity = global i32 1000000, align 4
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@sysctl_sched_migration_cost = constant i32 500000, align 4
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@sysctl_sched_shares_window = global i32 10000000, align 4
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@sysctl_sched_child_runs_first = common global i32 0, align 4
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@cpu_online_mask = external constant %struct.cpumask*
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; Function Attrs: noinline nounwind
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define void @sched_init_granularity() #0 {
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entry:
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tail call fastcc void @update_sysctl()
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ret void
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}
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; Function Attrs: noinline nounwind
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define internal fastcc void @update_sysctl() #0 {
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entry:
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%call = tail call i32 @get_update_sysctl_factor()
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%0 = load i32, i32* @normalized_sysctl_sched_min_granularity, align 4, !tbaa !1
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%mul = mul i32 %0, %call
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store i32 %mul, i32* @sysctl_sched_min_granularity, align 4, !tbaa !1
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%1 = load i32, i32* @normalized_sysctl_sched_latency, align 4, !tbaa !1
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%mul1 = mul i32 %1, %call
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store i32 %mul1, i32* @sysctl_sched_latency, align 4, !tbaa !1
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%2 = load i32, i32* @normalized_sysctl_sched_wakeup_granularity, align 4, !tbaa !1
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%mul2 = mul i32 %2, %call
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store i32 %mul2, i32* @sysctl_sched_wakeup_granularity, align 4, !tbaa !1
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ret void
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}
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; Function Attrs: noinline nounwind
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define i32 @calc_delta_mine(i32 %delta_exec, i32 %weight, %struct.load_weight* nocapture %lw) #0 {
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entry:
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%cmp = icmp ugt i32 %weight, 1
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%conv = zext i32 %delta_exec to i64
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br i1 %cmp, label %if.then, label %if.end, !prof !5
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if.then: ; preds = %entry
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%conv2 = zext i32 %weight to i64
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%mul = mul i64 %conv2, %conv
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br label %if.end
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if.end: ; preds = %entry, %if.then
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%tmp.0 = phi i64 [ %mul, %if.then ], [ %conv, %entry ]
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%inv_weight = getelementptr inbounds %struct.load_weight, %struct.load_weight* %lw, i32 0, i32 1
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%0 = load i32, i32* %inv_weight, align 4, !tbaa !6
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%tobool4 = icmp eq i32 %0, 0
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br i1 %tobool4, label %if.then5, label %if.end22
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if.then5: ; preds = %if.end
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%weight7 = getelementptr inbounds %struct.load_weight, %struct.load_weight* %lw, i32 0, i32 0
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%1 = load i32, i32* %weight7, align 4, !tbaa !9
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%lnot9 = icmp eq i32 %1, 0
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br i1 %lnot9, label %if.then17, label %if.else19, !prof !10
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if.then17: ; preds = %if.then5
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store i32 -1, i32* %inv_weight, align 4, !tbaa !6
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br label %if.end22
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if.else19: ; preds = %if.then5
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%div = udiv i32 -1, %1
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store i32 %div, i32* %inv_weight, align 4, !tbaa !6
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br label %if.end22
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if.end22: ; preds = %if.end, %if.then17, %if.else19
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%2 = phi i32 [ %0, %if.end ], [ -1, %if.then17 ], [ %div, %if.else19 ]
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%cmp23 = icmp ugt i64 %tmp.0, 4294967295
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br i1 %cmp23, label %if.then31, label %if.else37, !prof !10
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if.then31: ; preds = %if.end22
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%add = add i64 %tmp.0, 32768
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%shr = lshr i64 %add, 16
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%conv33 = zext i32 %2 to i64
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%mul34 = mul i64 %conv33, %shr
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%add35 = add i64 %mul34, 32768
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%shr36 = lshr i64 %add35, 16
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br label %if.end43
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if.else37: ; preds = %if.end22
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%conv39 = zext i32 %2 to i64
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%mul40 = mul i64 %conv39, %tmp.0
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%add41 = add i64 %mul40, 2147483648
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%shr42 = lshr i64 %add41, 32
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br label %if.end43
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if.end43: ; preds = %if.else37, %if.then31
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%tmp.1 = phi i64 [ %shr36, %if.then31 ], [ %shr42, %if.else37 ]
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%cmp49 = icmp ult i64 %tmp.1, 2147483647
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%3 = trunc i64 %tmp.1 to i32
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%conv51 = select i1 %cmp49, i32 %3, i32 2147483647
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ret i32 %conv51
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}
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declare i32 @get_update_sysctl_factor() #0
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declare i32 @__bitmap_weight(i32*, i32) #0
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attributes #0 = { noinline nounwind }
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!1 = !{!2, !2, i64 0}
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!2 = !{!"int", !3, i64 0}
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!3 = !{!"omnipotent char", !4, i64 0}
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!4 = !{!"Simple C/C++ TBAA"}
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!5 = !{!"branch_weights", i32 64, i32 4}
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!6 = !{!7, !8, i64 4}
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!7 = !{!"load_weight", !8, i64 0, !8, i64 4}
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!8 = !{!"long", !3, i64 0}
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!9 = !{!7, !8, i64 0}
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!10 = !{!"branch_weights", i32 4, i32 64}
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!11 = !{!12, !12, i64 0}
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!12 = !{!"any pointer", !3, i64 0}
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!13 = !{!3, !3, i64 0}
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!14 = !{i32 45854, i32 45878}
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