168 lines
6.4 KiB
YAML
168 lines
6.4 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
|
|
# RUN: llc -march=amdgcn -mcpu=tahiti -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=WAVE64 %s
|
|
# RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=WAVE32 %s
|
|
|
|
---
|
|
name: class_s32_vcc_sv
|
|
legalized: true
|
|
regBankSelected: true
|
|
tracksRegLiveness: true
|
|
|
|
body: |
|
|
bb.0:
|
|
liveins: $sgpr0, $vgpr0
|
|
; WAVE64-LABEL: name: class_s32_vcc_sv
|
|
; WAVE64: liveins: $sgpr0, $vgpr0
|
|
; WAVE64: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
|
|
; WAVE64: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
|
; WAVE64: [[V_CMP_CLASS_F32_e64_:%[0-9]+]]:sreg_64 = V_CMP_CLASS_F32_e64 0, [[COPY]], [[COPY1]], implicit $exec
|
|
; WAVE64: S_ENDPGM 0, implicit [[V_CMP_CLASS_F32_e64_]]
|
|
; WAVE32-LABEL: name: class_s32_vcc_sv
|
|
; WAVE32: liveins: $sgpr0, $vgpr0
|
|
; WAVE32: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
|
|
; WAVE32: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
|
; WAVE32: [[V_CMP_CLASS_F32_e64_:%[0-9]+]]:sreg_32 = V_CMP_CLASS_F32_e64 0, [[COPY]], [[COPY1]], implicit $exec
|
|
; WAVE32: S_ENDPGM 0, implicit [[V_CMP_CLASS_F32_e64_]]
|
|
%0:sgpr(s32) = COPY $sgpr0
|
|
%1:vgpr(s32) = COPY $vgpr0
|
|
%2:vcc(s1) = G_INTRINSIC intrinsic(@llvm.amdgcn.class), %0, %1
|
|
S_ENDPGM 0, implicit %2
|
|
...
|
|
|
|
---
|
|
name: class_s32_vcc_vs
|
|
legalized: true
|
|
regBankSelected: true
|
|
tracksRegLiveness: true
|
|
|
|
body: |
|
|
bb.0:
|
|
liveins: $sgpr0, $vgpr0
|
|
; WAVE64-LABEL: name: class_s32_vcc_vs
|
|
; WAVE64: liveins: $sgpr0, $vgpr0
|
|
; WAVE64: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
|
; WAVE64: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
|
|
; WAVE64: [[V_CMP_CLASS_F32_e64_:%[0-9]+]]:sreg_64 = V_CMP_CLASS_F32_e64 0, [[COPY]], [[COPY1]], implicit $exec
|
|
; WAVE64: S_ENDPGM 0, implicit [[V_CMP_CLASS_F32_e64_]]
|
|
; WAVE32-LABEL: name: class_s32_vcc_vs
|
|
; WAVE32: liveins: $sgpr0, $vgpr0
|
|
; WAVE32: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
|
; WAVE32: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
|
|
; WAVE32: [[V_CMP_CLASS_F32_e64_:%[0-9]+]]:sreg_32 = V_CMP_CLASS_F32_e64 0, [[COPY]], [[COPY1]], implicit $exec
|
|
; WAVE32: S_ENDPGM 0, implicit [[V_CMP_CLASS_F32_e64_]]
|
|
%0:vgpr(s32) = COPY $vgpr0
|
|
%1:sgpr(s32) = COPY $sgpr0
|
|
%2:vcc(s1) = G_INTRINSIC intrinsic(@llvm.amdgcn.class), %0, %1
|
|
S_ENDPGM 0, implicit %2
|
|
...
|
|
|
|
---
|
|
name: class_s32_vcc_vv
|
|
legalized: true
|
|
regBankSelected: true
|
|
tracksRegLiveness: true
|
|
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0, $vgpr1
|
|
; WAVE64-LABEL: name: class_s32_vcc_vv
|
|
; WAVE64: liveins: $vgpr0, $vgpr1
|
|
; WAVE64: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
|
; WAVE64: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
|
|
; WAVE64: [[V_CMP_CLASS_F32_e64_:%[0-9]+]]:sreg_64 = V_CMP_CLASS_F32_e64 0, [[COPY]], [[COPY1]], implicit $exec
|
|
; WAVE64: S_ENDPGM 0, implicit [[V_CMP_CLASS_F32_e64_]]
|
|
; WAVE32-LABEL: name: class_s32_vcc_vv
|
|
; WAVE32: liveins: $vgpr0, $vgpr1
|
|
; WAVE32: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
|
; WAVE32: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
|
|
; WAVE32: [[V_CMP_CLASS_F32_e64_:%[0-9]+]]:sreg_32 = V_CMP_CLASS_F32_e64 0, [[COPY]], [[COPY1]], implicit $exec
|
|
; WAVE32: S_ENDPGM 0, implicit [[V_CMP_CLASS_F32_e64_]]
|
|
%0:vgpr(s32) = COPY $vgpr0
|
|
%1:vgpr(s32) = COPY $vgpr1
|
|
%2:vcc(s1) = G_INTRINSIC intrinsic(@llvm.amdgcn.class), %0, %1
|
|
S_ENDPGM 0, implicit %2
|
|
...
|
|
|
|
---
|
|
name: class_s64_vcc_sv
|
|
legalized: true
|
|
regBankSelected: true
|
|
tracksRegLiveness: true
|
|
|
|
body: |
|
|
bb.0:
|
|
liveins: $sgpr0_sgpr1, $vgpr0
|
|
; WAVE64-LABEL: name: class_s64_vcc_sv
|
|
; WAVE64: liveins: $sgpr0_sgpr1, $vgpr0
|
|
; WAVE64: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
|
|
; WAVE64: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
|
; WAVE64: [[V_CMP_CLASS_F64_e64_:%[0-9]+]]:sreg_64 = V_CMP_CLASS_F64_e64 0, [[COPY]], [[COPY1]], implicit $exec
|
|
; WAVE64: S_ENDPGM 0, implicit [[V_CMP_CLASS_F64_e64_]]
|
|
; WAVE32-LABEL: name: class_s64_vcc_sv
|
|
; WAVE32: liveins: $sgpr0_sgpr1, $vgpr0
|
|
; WAVE32: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
|
|
; WAVE32: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
|
; WAVE32: [[V_CMP_CLASS_F64_e64_:%[0-9]+]]:sreg_32 = V_CMP_CLASS_F64_e64 0, [[COPY]], [[COPY1]], implicit $exec
|
|
; WAVE32: S_ENDPGM 0, implicit [[V_CMP_CLASS_F64_e64_]]
|
|
%0:sgpr(s64) = COPY $sgpr0_sgpr1
|
|
%1:vgpr(s32) = COPY $vgpr0
|
|
%2:vcc(s1) = G_INTRINSIC intrinsic(@llvm.amdgcn.class), %0, %1
|
|
S_ENDPGM 0, implicit %2
|
|
...
|
|
|
|
---
|
|
name: class_s64_vcc_vs
|
|
legalized: true
|
|
regBankSelected: true
|
|
tracksRegLiveness: true
|
|
|
|
body: |
|
|
bb.0:
|
|
liveins: $sgpr0_sgpr1, $vgpr0
|
|
|
|
; WAVE64-LABEL: name: class_s64_vcc_vs
|
|
; WAVE64: liveins: $sgpr0_sgpr1, $vgpr0
|
|
; WAVE64: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
; WAVE64: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
|
|
; WAVE64: [[V_CMP_CLASS_F64_e64_:%[0-9]+]]:sreg_64 = V_CMP_CLASS_F64_e64 0, [[COPY]], [[COPY1]], implicit $exec
|
|
; WAVE64: S_ENDPGM 0, implicit [[V_CMP_CLASS_F64_e64_]]
|
|
; WAVE32-LABEL: name: class_s64_vcc_vs
|
|
; WAVE32: liveins: $sgpr0_sgpr1, $vgpr0
|
|
; WAVE32: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
; WAVE32: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
|
|
; WAVE32: [[V_CMP_CLASS_F64_e64_:%[0-9]+]]:sreg_32 = V_CMP_CLASS_F64_e64 0, [[COPY]], [[COPY1]], implicit $exec
|
|
; WAVE32: S_ENDPGM 0, implicit [[V_CMP_CLASS_F64_e64_]]
|
|
%0:vgpr(s64) = COPY $vgpr0_vgpr1
|
|
%1:sgpr(s32) = COPY $sgpr0
|
|
%2:vcc(s1) = G_INTRINSIC intrinsic(@llvm.amdgcn.class), %0, %1
|
|
S_ENDPGM 0, implicit %2
|
|
...
|
|
|
|
---
|
|
name: class_s64_vcc_vv
|
|
legalized: true
|
|
regBankSelected: true
|
|
tracksRegLiveness: true
|
|
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1, $vgpr2
|
|
|
|
; WAVE64-LABEL: name: class_s64_vcc_vv
|
|
; WAVE64: liveins: $vgpr0_vgpr1, $vgpr2
|
|
; WAVE64: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
; WAVE64: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
|
|
; WAVE64: [[V_CMP_CLASS_F64_e64_:%[0-9]+]]:sreg_64 = V_CMP_CLASS_F64_e64 0, [[COPY]], [[COPY1]], implicit $exec
|
|
; WAVE64: S_ENDPGM 0, implicit [[V_CMP_CLASS_F64_e64_]]
|
|
; WAVE32-LABEL: name: class_s64_vcc_vv
|
|
; WAVE32: liveins: $vgpr0_vgpr1, $vgpr2
|
|
; WAVE32: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
; WAVE32: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
|
|
; WAVE32: [[V_CMP_CLASS_F64_e64_:%[0-9]+]]:sreg_32 = V_CMP_CLASS_F64_e64 0, [[COPY]], [[COPY1]], implicit $exec
|
|
; WAVE32: S_ENDPGM 0, implicit [[V_CMP_CLASS_F64_e64_]]
|
|
%0:vgpr(s64) = COPY $vgpr0_vgpr1
|
|
%1:vgpr(s32) = COPY $vgpr2
|
|
%2:vcc(s1) = G_INTRINSIC intrinsic(@llvm.amdgcn.class), %0, %1
|
|
S_ENDPGM 0, implicit %2
|
|
...
|