169 lines
5.1 KiB
YAML
169 lines
5.1 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=aarch64-unknown-unknown -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
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--- |
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define void @strxrox(i64* %addr) { ret void }
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define void @strdrox(i64* %addr) { ret void }
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define void @strwrox(i64* %addr) { ret void }
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define void @strsrox(i64* %addr) { ret void }
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define void @strhrox(i64* %addr) { ret void }
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define void @strqrox(i64* %addr) { ret void }
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define void @shl(i64* %addr) { ret void }
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...
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---
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name: strxrox
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $x0, $x1, $x2
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; CHECK-LABEL: name: strxrox
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; CHECK: liveins: $x0, $x1, $x2
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; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
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; CHECK: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
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; CHECK: [[COPY2:%[0-9]+]]:gpr64 = COPY $x2
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; CHECK: STRXroX [[COPY2]], [[COPY]], [[COPY1]], 0, 0 :: (store 8 into %ir.addr)
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%0:gpr(p0) = COPY $x0
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%1:gpr(s64) = COPY $x1
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%ptr:gpr(p0) = G_PTR_ADD %0, %1
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%3:gpr(s64) = COPY $x2
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G_STORE %3, %ptr :: (store 8 into %ir.addr)
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...
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---
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name: strdrox
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $x0, $x1, $d2
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; CHECK-LABEL: name: strdrox
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; CHECK: liveins: $x0, $x1, $d2
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; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
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; CHECK: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
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; CHECK: [[COPY2:%[0-9]+]]:fpr64 = COPY $d2
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; CHECK: STRDroX [[COPY2]], [[COPY]], [[COPY1]], 0, 0 :: (store 8 into %ir.addr)
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%0:gpr(p0) = COPY $x0
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%1:gpr(s64) = COPY $x1
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%ptr:gpr(p0) = G_PTR_ADD %0, %1
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%3:fpr(s64) = COPY $d2
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G_STORE %3, %ptr :: (store 8 into %ir.addr)
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...
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---
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name: strwrox
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $x0, $x1, $w2
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; CHECK-LABEL: name: strwrox
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; CHECK: liveins: $x0, $x1, $w2
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; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
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; CHECK: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
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; CHECK: [[COPY2:%[0-9]+]]:gpr32 = COPY $w2
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; CHECK: STRWroX [[COPY2]], [[COPY]], [[COPY1]], 0, 0 :: (store 4 into %ir.addr)
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%0:gpr(p0) = COPY $x0
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%1:gpr(s64) = COPY $x1
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%ptr:gpr(p0) = G_PTR_ADD %0, %1
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%3:gpr(s32) = COPY $w2
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G_STORE %3, %ptr :: (store 4 into %ir.addr)
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...
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---
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name: strsrox
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $x0, $x1, $s2
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; CHECK-LABEL: name: strsrox
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; CHECK: liveins: $x0, $x1, $s2
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; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
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; CHECK: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
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; CHECK: [[COPY2:%[0-9]+]]:fpr32 = COPY $s2
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; CHECK: STRSroX [[COPY2]], [[COPY]], [[COPY1]], 0, 0 :: (store 4 into %ir.addr)
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%0:gpr(p0) = COPY $x0
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%1:gpr(s64) = COPY $x1
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%ptr:gpr(p0) = G_PTR_ADD %0, %1
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%3:fpr(s32) = COPY $s2
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G_STORE %3, %ptr :: (store 4 into %ir.addr)
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...
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---
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name: strhrox
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $x0, $x1, $h0
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; CHECK-LABEL: name: strhrox
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; CHECK: liveins: $x0, $x1, $h0
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; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
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; CHECK: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
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; CHECK: [[COPY2:%[0-9]+]]:fpr16 = COPY $h0
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; CHECK: STRHroX [[COPY2]], [[COPY]], [[COPY1]], 0, 0 :: (store 2 into %ir.addr)
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%0:gpr(p0) = COPY $x0
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%1:gpr(s64) = COPY $x1
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%ptr:gpr(p0) = G_PTR_ADD %0, %1
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%3:fpr(s16) = COPY $h0
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G_STORE %3, %ptr :: (store 2 into %ir.addr)
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...
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---
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name: strqrox
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $x0, $x1, $q2
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; CHECK-LABEL: name: strqrox
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; CHECK: liveins: $x0, $x1, $q2
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; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
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; CHECK: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
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; CHECK: [[COPY2:%[0-9]+]]:fpr128 = COPY $q2
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; CHECK: STRQroX [[COPY2]], [[COPY]], [[COPY1]], 0, 0 :: (store 16 into %ir.addr)
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%0:gpr(p0) = COPY $x0
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%1:gpr(s64) = COPY $x1
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%ptr:gpr(p0) = G_PTR_ADD %0, %1
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%2:fpr(<2 x s64>) = COPY $q2
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G_STORE %2, %ptr :: (store 16 into %ir.addr)
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...
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---
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name: shl
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $x0, $x1, $x2
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; CHECK-LABEL: name: shl
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; CHECK: liveins: $x0, $x1, $x2
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; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
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; CHECK: [[COPY1:%[0-9]+]]:gpr64sp = COPY $x1
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; CHECK: [[COPY2:%[0-9]+]]:gpr64 = COPY $x2
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; CHECK: STRXroX [[COPY2]], [[COPY1]], [[COPY]], 0, 1 :: (store 8 into %ir.addr)
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%0:gpr(s64) = COPY $x0
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%1:gpr(s64) = G_CONSTANT i64 3
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%2:gpr(s64) = G_SHL %0, %1(s64)
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%3:gpr(p0) = COPY $x1
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%ptr:gpr(p0) = G_PTR_ADD %3, %2
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%4:gpr(s64) = COPY $x2
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G_STORE %4, %ptr :: (store 8 into %ir.addr)
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