llvm-for-llvmta/test/CodeGen/AArch64/GlobalISel/select-fp16-fconstant.mir

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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=aarch64-unknown-unknown -mattr=+fullfp16 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
---
name: positive_zero
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.0:
; CHECK-LABEL: name: positive_zero
; CHECK: [[FMOVH0_:%[0-9]+]]:fpr16 = FMOVH0
; CHECK: $h0 = COPY [[FMOVH0_]]
; CHECK: RET_ReallyLR implicit $h0
%0:fpr(s16) = G_FCONSTANT half 0.0
$h0 = COPY %0(s16)
RET_ReallyLR implicit $h0