llvm-for-llvmta/test/CodeGen/AArch64/GlobalISel/regbank-inlineasm.mir

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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=aarch64-unknown-unknown -verify-machineinstrs -O0 -run-pass=regbankselect %s -o - | FileCheck %s
---
name: inlineasm_memory_clobber
alignment: 4
legalized: true
tracksRegLiveness: true
body: |
bb.1:
; CHECK-LABEL: name: inlineasm_memory_clobber
; CHECK: INLINEASM &"", 25 /* sideeffect mayload maystore attdialect */
; CHECK: INLINEASM &"", 1 /* sideeffect attdialect */
; CHECK: RET_ReallyLR
INLINEASM &"", 25
INLINEASM &"", 1
RET_ReallyLR
...
---
name: inlineasm_register_clobber
alignment: 4
legalized: true
tracksRegLiveness: true
body: |
bb.1:
; CHECK-LABEL: name: inlineasm_register_clobber
; CHECK: INLINEASM &"", 25 /* sideeffect mayload maystore attdialect */, 12 /* clobber */, implicit-def early-clobber $d0
; CHECK: RET_ReallyLR
INLINEASM &"", 25, 12, implicit-def early-clobber $d0
RET_ReallyLR
...
---
name: inlineasm_phys_reg_output
alignment: 4
legalized: true
tracksRegLiveness: true
body: |
bb.1:
; CHECK-LABEL: name: inlineasm_phys_reg_output
; CHECK: INLINEASM &"mov ${0:w}, 7", 0 /* attdialect */, 10 /* regdef */, implicit-def $w0
; CHECK: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0
; CHECK: $w0 = COPY [[COPY]](s32)
; CHECK: RET_ReallyLR implicit $w0
INLINEASM &"mov ${0:w}, 7", 0 /* attdialect */, 10 /* regdef */, implicit-def $w0
%0:_(s32) = COPY $w0
$w0 = COPY %0(s32)
RET_ReallyLR implicit $w0
...
---
name: inlineasm_virt_reg_output
alignment: 4
legalized: true
tracksRegLiveness: true
body: |
bb.1:
; CHECK-LABEL: name: inlineasm_virt_reg_output
; CHECK: INLINEASM &"mov ${0:w}, 7", 0 /* attdialect */, 655370 /* regdef:GPR32common */, def %0
; CHECK: [[COPY:%[0-9]+]]:gpr(s32) = COPY %0
; CHECK: $w0 = COPY [[COPY]](s32)
; CHECK: RET_ReallyLR implicit $w0
INLINEASM &"mov ${0:w}, 7", 0 /* attdialect */, 655370 /* regdef:GPR32common */, def %0:gpr32common
%1:_(s32) = COPY %0
$w0 = COPY %1(s32)
RET_ReallyLR implicit $w0
...
---
name: inlineasm_virt_mixed_types
alignment: 4
legalized: true
tracksRegLiveness: true
body: |
bb.1:
; CHECK-LABEL: name: inlineasm_virt_mixed_types
; CHECK: INLINEASM &"mov $0, #0; mov $1, #0", 0 /* attdialect */, 655370 /* regdef:GPR32common */, def %0, 1245194 /* regdef:FPR64 */, def %1
; CHECK: [[COPY:%[0-9]+]]:gpr(s32) = COPY %0
; CHECK: [[COPY1:%[0-9]+]]:fpr(s64) = COPY %1
; CHECK: $d0 = COPY [[COPY1]](s64)
; CHECK: RET_ReallyLR implicit $d0
INLINEASM &"mov $0, #0; mov $1, #0", 0 /* attdialect */, 655370 /* regdef:GPR32common */, def %0:gpr32common, 1245194 /* regdef:FPR64 */, def %1:fpr64
%3:_(s32) = COPY %0
%4:_(s64) = COPY %1
$d0 = COPY %4(s64)
RET_ReallyLR implicit $d0
...