123 lines
4.7 KiB
LLVM
123 lines
4.7 KiB
LLVM
; RUN: opt -cost-model -analyze -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx900 -mattr=+half-rate-64-ops < %s | FileCheck -check-prefixes=ALL,FAST64,FAST16 %s
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; RUN: opt -cost-model -analyze -mtriple=amdgcn-unknown-amdhsa -mattr=-half-rate-64-ops < %s | FileCheck -check-prefixes=ALL,SLOW64,SLOW16 %s
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; RUN: opt -cost-model -cost-kind=code-size -analyze -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx900 -mattr=+half-rate-64-ops < %s | FileCheck -check-prefixes=ALL,SIZEALL,FAST16 %s
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; RUN: opt -cost-model -cost-kind=code-size -analyze -mtriple=amdgcn-unknown-amdhsa -mattr=-half-rate-64-ops < %s | FileCheck -check-prefixes=ALL,SIZEALL,SLOW16 %s
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; ALL-LABEL: 'shl_i32'
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; ALL: estimated cost of 1 for {{.*}} shl i32
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define amdgpu_kernel void @shl_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %vaddr, i32 %b) #0 {
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%vec = load i32, i32 addrspace(1)* %vaddr
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%or = shl i32 %vec, %b
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store i32 %or, i32 addrspace(1)* %out
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ret void
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}
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; ALL-LABEL: 'shl_i64'
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; FAST64: estimated cost of 2 for {{.*}} shl i64
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; SLOW64: estimated cost of 4 for {{.*}} shl i64
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; SIZEALL: estimated cost of 2 for {{.*}} shl i64
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define amdgpu_kernel void @shl_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %vaddr, i64 %b) #0 {
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%vec = load i64, i64 addrspace(1)* %vaddr
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%or = shl i64 %vec, %b
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store i64 %or, i64 addrspace(1)* %out
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ret void
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}
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; ALL-LABEL: 'shl_i16'
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; ALL: estimated cost of 1 for {{.*}} shl i16
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define amdgpu_kernel void @shl_i16(i16 addrspace(1)* %out, i16 addrspace(1)* %vaddr, i16 %b) #0 {
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%vec = load i16, i16 addrspace(1)* %vaddr
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%or = shl i16 %vec, %b
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store i16 %or, i16 addrspace(1)* %out
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ret void
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}
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; ALL-LABEL: 'shl_v2i16'
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; SLOW16: estimated cost of 2 for {{.*}} shl <2 x i16>
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; FAST16: estimated cost of 1 for {{.*}} shl <2 x i16>
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define amdgpu_kernel void @shl_v2i16(<2 x i16> addrspace(1)* %out, <2 x i16> addrspace(1)* %vaddr, <2 x i16> %b) #0 {
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%vec = load <2 x i16>, <2 x i16> addrspace(1)* %vaddr
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%or = shl <2 x i16> %vec, %b
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store <2 x i16> %or, <2 x i16> addrspace(1)* %out
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ret void
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}
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; ALL-LABEL: 'lshr_i32'
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; ALL: estimated cost of 1 for {{.*}} lshr i32
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define amdgpu_kernel void @lshr_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %vaddr, i32 %b) #0 {
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%vec = load i32, i32 addrspace(1)* %vaddr
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%or = lshr i32 %vec, %b
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store i32 %or, i32 addrspace(1)* %out
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ret void
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}
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; ALL-LABEL: 'lshr_i64'
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; FAST64: estimated cost of 2 for {{.*}} lshr i64
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; SLOW64: estimated cost of 4 for {{.*}} lshr i64
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; SIZEALL: estimated cost of 2 for {{.*}} lshr i64
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define amdgpu_kernel void @lshr_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %vaddr, i64 %b) #0 {
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%vec = load i64, i64 addrspace(1)* %vaddr
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%or = lshr i64 %vec, %b
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store i64 %or, i64 addrspace(1)* %out
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ret void
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}
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; ALL-LABEL: 'lshr_i16'
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; ALL: estimated cost of 1 for {{.*}} lshr i16
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define amdgpu_kernel void @lshr_i16(i16 addrspace(1)* %out, i16 addrspace(1)* %vaddr, i16 %b) #0 {
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%vec = load i16, i16 addrspace(1)* %vaddr
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%or = lshr i16 %vec, %b
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store i16 %or, i16 addrspace(1)* %out
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ret void
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}
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; ALL-LABEL: 'lshr_v2i16'
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; SLOW16: estimated cost of 2 for {{.*}} lshr <2 x i16>
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; FAST16: estimated cost of 1 for {{.*}} lshr <2 x i16>
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define amdgpu_kernel void @lshr_v2i16(<2 x i16> addrspace(1)* %out, <2 x i16> addrspace(1)* %vaddr, <2 x i16> %b) #0 {
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%vec = load <2 x i16>, <2 x i16> addrspace(1)* %vaddr
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%or = lshr <2 x i16> %vec, %b
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store <2 x i16> %or, <2 x i16> addrspace(1)* %out
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ret void
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}
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; ALL-LABEL: 'ashr_i32'
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; ALL: estimated cost of 1 for {{.*}} ashr i32
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define amdgpu_kernel void @ashr_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %vaddr, i32 %b) #0 {
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%vec = load i32, i32 addrspace(1)* %vaddr
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%or = ashr i32 %vec, %b
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store i32 %or, i32 addrspace(1)* %out
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ret void
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}
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; ALL-LABEL: 'ashr_i64'
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; FAST64: estimated cost of 2 for {{.*}} ashr i64
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; SLOW64: estimated cost of 4 for {{.*}} ashr i64
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define amdgpu_kernel void @ashr_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %vaddr, i64 %b) #0 {
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%vec = load i64, i64 addrspace(1)* %vaddr
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%or = ashr i64 %vec, %b
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store i64 %or, i64 addrspace(1)* %out
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ret void
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}
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; ALL-LABEL: 'ashr_i16'
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; ALL: estimated cost of 1 for {{.*}} ashr i16
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define amdgpu_kernel void @ashr_i16(i16 addrspace(1)* %out, i16 addrspace(1)* %vaddr, i16 %b) #0 {
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%vec = load i16, i16 addrspace(1)* %vaddr
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%or = ashr i16 %vec, %b
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store i16 %or, i16 addrspace(1)* %out
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ret void
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}
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; ALL-LABEL: 'ashr_v2i16'
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; SLOW16: estimated cost of 2 for {{.*}} ashr <2 x i16>
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; FAST16: estimated cost of 1 for {{.*}} ashr <2 x i16>
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define amdgpu_kernel void @ashr_v2i16(<2 x i16> addrspace(1)* %out, <2 x i16> addrspace(1)* %vaddr, <2 x i16> %b) #0 {
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%vec = load <2 x i16>, <2 x i16> addrspace(1)* %vaddr
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%or = ashr <2 x i16> %vec, %b
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store <2 x i16> %or, <2 x i16> addrspace(1)* %out
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ret void
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}
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attributes #0 = { nounwind }
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