115 lines
5.0 KiB
LLVM
115 lines
5.0 KiB
LLVM
; RUN: opt -cost-model -analyze -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx900 -mattr=+half-rate-64-ops < %s | FileCheck -check-prefixes=FASTF64,FASTF16,ALL %s
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; RUN: opt -cost-model -analyze -mtriple=amdgcn-unknown-amdhsa -mattr=-half-rate-64-ops < %s | FileCheck -check-prefixes=SLOWF64,SLOWF16,ALL %s
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; RUN: opt -cost-model -cost-kind=code-size -analyze -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx900 -mattr=+half-rate-64-ops < %s | FileCheck -check-prefixes=ALL,SIZEALL,FASTF16 %s
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; RUN: opt -cost-model -cost-kind=code-size -analyze -mtriple=amdgcn-unknown-amdhsa -mattr=-half-rate-64-ops < %s | FileCheck -check-prefixes=ALL,SIZEALL,SLOWF16 %s
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; ALL-LABEL: 'fmul_f32'
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; ALL: estimated cost of 1 for {{.*}} fmul float
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define amdgpu_kernel void @fmul_f32(float addrspace(1)* %out, float addrspace(1)* %vaddr, float %b) #0 {
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%vec = load float, float addrspace(1)* %vaddr
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%add = fmul float %vec, %b
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store float %add, float addrspace(1)* %out
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ret void
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}
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; ALL-LABEL: 'fmul_v2f32'
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; ALL: estimated cost of 2 for {{.*}} fmul <2 x float>
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define amdgpu_kernel void @fmul_v2f32(<2 x float> addrspace(1)* %out, <2 x float> addrspace(1)* %vaddr, <2 x float> %b) #0 {
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%vec = load <2 x float>, <2 x float> addrspace(1)* %vaddr
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%add = fmul <2 x float> %vec, %b
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store <2 x float> %add, <2 x float> addrspace(1)* %out
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ret void
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}
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; ALL-LABEL: 'fmul_v3f32'
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; ALL: estimated cost of 3 for {{.*}} fmul <3 x float>
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define amdgpu_kernel void @fmul_v3f32(<3 x float> addrspace(1)* %out, <3 x float> addrspace(1)* %vaddr, <3 x float> %b) #0 {
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%vec = load <3 x float>, <3 x float> addrspace(1)* %vaddr
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%add = fmul <3 x float> %vec, %b
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store <3 x float> %add, <3 x float> addrspace(1)* %out
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ret void
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}
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; ALL-LABEL: 'fmul_v5f32'
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; ALL: estimated cost of 5 for {{.*}} fmul <5 x float>
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define amdgpu_kernel void @fmul_v5f32(<5 x float> addrspace(1)* %out, <5 x float> addrspace(1)* %vaddr, <5 x float> %b) #0 {
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%vec = load <5 x float>, <5 x float> addrspace(1)* %vaddr
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%add = fmul <5 x float> %vec, %b
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store <5 x float> %add, <5 x float> addrspace(1)* %out
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ret void
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}
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; ALL-LABEL: 'fmul_f64'
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; FASTF64: estimated cost of 2 for {{.*}} fmul double
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; SLOWF64: estimated cost of 4 for {{.*}} fmul double
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; SIZEALL: estimated cost of 2 for {{.*}} fmul double
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define amdgpu_kernel void @fmul_f64(double addrspace(1)* %out, double addrspace(1)* %vaddr, double %b) #0 {
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%vec = load double, double addrspace(1)* %vaddr
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%add = fmul double %vec, %b
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store double %add, double addrspace(1)* %out
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ret void
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}
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; ALL-LABEL: 'fmul_v2f64'
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; FASTF64: estimated cost of 4 for {{.*}} fmul <2 x double>
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; SLOWF64: estimated cost of 8 for {{.*}} fmul <2 x double>
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; SIZEALL: estimated cost of 4 for {{.*}} fmul <2 x double>
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define amdgpu_kernel void @fmul_v2f64(<2 x double> addrspace(1)* %out, <2 x double> addrspace(1)* %vaddr, <2 x double> %b) #0 {
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%vec = load <2 x double>, <2 x double> addrspace(1)* %vaddr
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%add = fmul <2 x double> %vec, %b
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store <2 x double> %add, <2 x double> addrspace(1)* %out
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ret void
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}
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; ALL-LABEL: 'fmul_v3f64'
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; FASTF64: estimated cost of 6 for {{.*}} fmul <3 x double>
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; SLOWF64: estimated cost of 12 for {{.*}} fmul <3 x double>
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; SIZEALL: estimated cost of 6 for {{.*}} fmul <3 x double>
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define amdgpu_kernel void @fmul_v3f64(<3 x double> addrspace(1)* %out, <3 x double> addrspace(1)* %vaddr, <3 x double> %b) #0 {
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%vec = load <3 x double>, <3 x double> addrspace(1)* %vaddr
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%add = fmul <3 x double> %vec, %b
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store <3 x double> %add, <3 x double> addrspace(1)* %out
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ret void
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}
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; ALL-LABEL: 'fmul_f16'
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; ALL: estimated cost of 1 for {{.*}} fmul half
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define amdgpu_kernel void @fmul_f16(half addrspace(1)* %out, half addrspace(1)* %vaddr, half %b) #0 {
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%vec = load half, half addrspace(1)* %vaddr
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%add = fmul half %vec, %b
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store half %add, half addrspace(1)* %out
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ret void
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}
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; ALL-LABEL: 'fmul_v2f16'
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; SLOWF16: estimated cost of 2 for {{.*}} fmul <2 x half>
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; FASTF16: estimated cost of 1 for {{.*}} fmul <2 x half>
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define amdgpu_kernel void @fmul_v2f16(<2 x half> addrspace(1)* %out, <2 x half> addrspace(1)* %vaddr, <2 x half> %b) #0 {
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%vec = load <2 x half>, <2 x half> addrspace(1)* %vaddr
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%add = fmul <2 x half> %vec, %b
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store <2 x half> %add, <2 x half> addrspace(1)* %out
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ret void
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}
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; ALL-LABEL: 'fmul_v3f16'
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; SLOWF16: estimated cost of 4 for {{.*}} fmul <3 x half>
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; FASTF16: estimated cost of 2 for {{.*}} fmul <3 x half>
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define amdgpu_kernel void @fmul_v3f16(<3 x half> addrspace(1)* %out, <3 x half> addrspace(1)* %vaddr, <3 x half> %b) #0 {
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%vec = load <3 x half>, <3 x half> addrspace(1)* %vaddr
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%add = fmul <3 x half> %vec, %b
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store <3 x half> %add, <3 x half> addrspace(1)* %out
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ret void
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}
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; ALL-LABEL: 'fmul_v4f16'
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; SLOWF16: estimated cost of 4 for {{.*}} fmul <4 x half>
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; FASTF16: estimated cost of 2 for {{.*}} fmul <4 x half>
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define amdgpu_kernel void @fmul_v4f16(<4 x half> addrspace(1)* %out, <4 x half> addrspace(1)* %vaddr, <4 x half> %b) #0 {
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%vec = load <4 x half>, <4 x half> addrspace(1)* %vaddr
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%add = fmul <4 x half> %vec, %b
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store <4 x half> %add, <4 x half> addrspace(1)* %out
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ret void
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}
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attributes #0 = { nounwind }
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