105 lines
2.9 KiB
C++
105 lines
2.9 KiB
C++
//===-- AMDGPUMachineFunctionInfo.h -------------------------------*- C++ -*-=//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUMACHINEFUNCTION_H
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#define LLVM_LIB_TARGET_AMDGPU_AMDGPUMACHINEFUNCTION_H
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#include "Utils/AMDGPUBaseInfo.h"
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#include "llvm/ADT/DenseMap.h"
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#include "llvm/CodeGen/MachineFunction.h"
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namespace llvm {
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class GCNSubtarget;
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class AMDGPUMachineFunction : public MachineFunctionInfo {
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/// A map to keep track of local memory objects and their offsets within the
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/// local memory space.
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SmallDenseMap<const GlobalValue *, unsigned, 4> LocalMemoryObjects;
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protected:
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uint64_t ExplicitKernArgSize = 0; // Cache for this.
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Align MaxKernArgAlign; // Cache for this.
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/// Number of bytes in the LDS that are being used.
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unsigned LDSSize = 0;
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/// Number of bytes in the LDS allocated statically. This field is only used
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/// in the instruction selector and not part of the machine function info.
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unsigned StaticLDSSize = 0;
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/// Align for dynamic shared memory if any. Dynamic shared memory is
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/// allocated directly after the static one, i.e., LDSSize. Need to pad
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/// LDSSize to ensure that dynamic one is aligned accordingly.
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/// The maximal alignment is updated during IR translation or lowering
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/// stages.
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Align DynLDSAlign;
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// State of MODE register, assumed FP mode.
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AMDGPU::SIModeRegisterDefaults Mode;
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// Kernels + shaders. i.e. functions called by the hardware and not called
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// by other functions.
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bool IsEntryFunction = false;
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// Entry points called by other functions instead of directly by the hardware.
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bool IsModuleEntryFunction = false;
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bool NoSignedZerosFPMath = false;
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// Function may be memory bound.
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bool MemoryBound = false;
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// Kernel may need limited waves per EU for better performance.
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bool WaveLimiter = false;
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public:
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AMDGPUMachineFunction(const MachineFunction &MF);
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uint64_t getExplicitKernArgSize() const {
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return ExplicitKernArgSize;
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}
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unsigned getMaxKernArgAlign() const { return MaxKernArgAlign.value(); }
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unsigned getLDSSize() const {
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return LDSSize;
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}
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AMDGPU::SIModeRegisterDefaults getMode() const {
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return Mode;
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}
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bool isEntryFunction() const {
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return IsEntryFunction;
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}
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bool isModuleEntryFunction() const { return IsModuleEntryFunction; }
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bool hasNoSignedZerosFPMath() const {
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return NoSignedZerosFPMath;
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}
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bool isMemoryBound() const {
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return MemoryBound;
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}
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bool needsWaveLimiter() const {
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return WaveLimiter;
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}
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unsigned allocateLDSGlobal(const DataLayout &DL, const GlobalVariable &GV);
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Align getDynLDSAlign() const { return DynLDSAlign; }
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void setDynLDSAlign(const DataLayout &DL, const GlobalVariable &GV);
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};
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}
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#endif
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