1115 lines
40 KiB
C++
1115 lines
40 KiB
C++
//===- TargetTransformInfoImpl.h --------------------------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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/// \file
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/// This file provides helpers for the implementation of
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/// a TargetTransformInfo-conforming class.
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///
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_ANALYSIS_TARGETTRANSFORMINFOIMPL_H
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#define LLVM_ANALYSIS_TARGETTRANSFORMINFOIMPL_H
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#include "llvm/Analysis/ScalarEvolutionExpressions.h"
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#include "llvm/Analysis/TargetTransformInfo.h"
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#include "llvm/Analysis/VectorUtils.h"
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#include "llvm/IR/DataLayout.h"
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#include "llvm/IR/Function.h"
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#include "llvm/IR/GetElementPtrTypeIterator.h"
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#include "llvm/IR/IntrinsicInst.h"
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#include "llvm/IR/Operator.h"
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#include "llvm/IR/Type.h"
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namespace llvm {
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/// Base class for use as a mix-in that aids implementing
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/// a TargetTransformInfo-compatible class.
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class TargetTransformInfoImplBase {
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protected:
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typedef TargetTransformInfo TTI;
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const DataLayout &DL;
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explicit TargetTransformInfoImplBase(const DataLayout &DL) : DL(DL) {}
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public:
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// Provide value semantics. MSVC requires that we spell all of these out.
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TargetTransformInfoImplBase(const TargetTransformInfoImplBase &Arg)
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: DL(Arg.DL) {}
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TargetTransformInfoImplBase(TargetTransformInfoImplBase &&Arg) : DL(Arg.DL) {}
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const DataLayout &getDataLayout() const { return DL; }
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int getGEPCost(Type *PointeeType, const Value *Ptr,
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ArrayRef<const Value *> Operands,
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TTI::TargetCostKind CostKind = TTI::TCK_SizeAndLatency) const {
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// In the basic model, we just assume that all-constant GEPs will be folded
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// into their uses via addressing modes.
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for (unsigned Idx = 0, Size = Operands.size(); Idx != Size; ++Idx)
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if (!isa<Constant>(Operands[Idx]))
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return TTI::TCC_Basic;
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return TTI::TCC_Free;
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}
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unsigned getEstimatedNumberOfCaseClusters(const SwitchInst &SI,
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unsigned &JTSize,
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ProfileSummaryInfo *PSI,
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BlockFrequencyInfo *BFI) const {
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(void)PSI;
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(void)BFI;
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JTSize = 0;
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return SI.getNumCases();
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}
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unsigned getInliningThresholdMultiplier() const { return 1; }
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unsigned adjustInliningThreshold(const CallBase *CB) const { return 0; }
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int getInlinerVectorBonusPercent() const { return 150; }
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unsigned getMemcpyCost(const Instruction *I) const {
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return TTI::TCC_Expensive;
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}
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bool hasBranchDivergence() const { return false; }
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bool useGPUDivergenceAnalysis() const { return false; }
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bool isSourceOfDivergence(const Value *V) const { return false; }
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bool isAlwaysUniform(const Value *V) const { return false; }
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unsigned getFlatAddressSpace() const { return -1; }
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bool collectFlatAddressOperands(SmallVectorImpl<int> &OpIndexes,
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Intrinsic::ID IID) const {
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return false;
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}
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bool isNoopAddrSpaceCast(unsigned, unsigned) const { return false; }
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unsigned getAssumedAddrSpace(const Value *V) const { return -1; }
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Value *rewriteIntrinsicWithAddressSpace(IntrinsicInst *II, Value *OldV,
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Value *NewV) const {
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return nullptr;
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}
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bool isLoweredToCall(const Function *F) const {
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assert(F && "A concrete function must be provided to this routine.");
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// FIXME: These should almost certainly not be handled here, and instead
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// handled with the help of TLI or the target itself. This was largely
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// ported from existing analysis heuristics here so that such refactorings
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// can take place in the future.
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if (F->isIntrinsic())
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return false;
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if (F->hasLocalLinkage() || !F->hasName())
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return true;
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StringRef Name = F->getName();
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// These will all likely lower to a single selection DAG node.
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if (Name == "copysign" || Name == "copysignf" || Name == "copysignl" ||
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Name == "fabs" || Name == "fabsf" || Name == "fabsl" || Name == "sin" ||
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Name == "fmin" || Name == "fminf" || Name == "fminl" ||
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Name == "fmax" || Name == "fmaxf" || Name == "fmaxl" ||
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Name == "sinf" || Name == "sinl" || Name == "cos" || Name == "cosf" ||
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Name == "cosl" || Name == "sqrt" || Name == "sqrtf" || Name == "sqrtl")
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return false;
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// These are all likely to be optimized into something smaller.
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if (Name == "pow" || Name == "powf" || Name == "powl" || Name == "exp2" ||
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Name == "exp2l" || Name == "exp2f" || Name == "floor" ||
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Name == "floorf" || Name == "ceil" || Name == "round" ||
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Name == "ffs" || Name == "ffsl" || Name == "abs" || Name == "labs" ||
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Name == "llabs")
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return false;
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return true;
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}
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bool isHardwareLoopProfitable(Loop *L, ScalarEvolution &SE,
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AssumptionCache &AC, TargetLibraryInfo *LibInfo,
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HardwareLoopInfo &HWLoopInfo) const {
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return false;
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}
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bool preferPredicateOverEpilogue(Loop *L, LoopInfo *LI, ScalarEvolution &SE,
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AssumptionCache &AC, TargetLibraryInfo *TLI,
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DominatorTree *DT,
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const LoopAccessInfo *LAI) const {
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return false;
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}
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bool emitGetActiveLaneMask() const {
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return false;
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}
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Optional<Instruction *> instCombineIntrinsic(InstCombiner &IC,
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IntrinsicInst &II) const {
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return None;
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}
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Optional<Value *>
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simplifyDemandedUseBitsIntrinsic(InstCombiner &IC, IntrinsicInst &II,
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APInt DemandedMask, KnownBits &Known,
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bool &KnownBitsComputed) const {
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return None;
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}
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Optional<Value *> simplifyDemandedVectorEltsIntrinsic(
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InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts,
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APInt &UndefElts2, APInt &UndefElts3,
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std::function<void(Instruction *, unsigned, APInt, APInt &)>
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SimplifyAndSetOp) const {
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return None;
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}
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void getUnrollingPreferences(Loop *, ScalarEvolution &,
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TTI::UnrollingPreferences &) const {}
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void getPeelingPreferences(Loop *, ScalarEvolution &,
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TTI::PeelingPreferences &) const {}
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bool isLegalAddImmediate(int64_t Imm) const { return false; }
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bool isLegalICmpImmediate(int64_t Imm) const { return false; }
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bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
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bool HasBaseReg, int64_t Scale, unsigned AddrSpace,
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Instruction *I = nullptr) const {
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// Guess that only reg and reg+reg addressing is allowed. This heuristic is
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// taken from the implementation of LSR.
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return !BaseGV && BaseOffset == 0 && (Scale == 0 || Scale == 1);
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}
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bool isLSRCostLess(TTI::LSRCost &C1, TTI::LSRCost &C2) const {
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return std::tie(C1.NumRegs, C1.AddRecCost, C1.NumIVMuls, C1.NumBaseAdds,
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C1.ScaleCost, C1.ImmCost, C1.SetupCost) <
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std::tie(C2.NumRegs, C2.AddRecCost, C2.NumIVMuls, C2.NumBaseAdds,
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C2.ScaleCost, C2.ImmCost, C2.SetupCost);
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}
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bool isNumRegsMajorCostOfLSR() const { return true; }
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bool isProfitableLSRChainElement(Instruction *I) const { return false; }
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bool canMacroFuseCmp() const { return false; }
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bool canSaveCmp(Loop *L, BranchInst **BI, ScalarEvolution *SE, LoopInfo *LI,
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DominatorTree *DT, AssumptionCache *AC,
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TargetLibraryInfo *LibInfo) const {
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return false;
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}
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bool shouldFavorPostInc() const { return false; }
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bool shouldFavorBackedgeIndex(const Loop *L) const { return false; }
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bool isLegalMaskedStore(Type *DataType, Align Alignment) const {
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return false;
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}
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bool isLegalMaskedLoad(Type *DataType, Align Alignment) const {
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return false;
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}
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bool isLegalNTStore(Type *DataType, Align Alignment) const {
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// By default, assume nontemporal memory stores are available for stores
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// that are aligned and have a size that is a power of 2.
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unsigned DataSize = DL.getTypeStoreSize(DataType);
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return Alignment >= DataSize && isPowerOf2_32(DataSize);
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}
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bool isLegalNTLoad(Type *DataType, Align Alignment) const {
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// By default, assume nontemporal memory loads are available for loads that
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// are aligned and have a size that is a power of 2.
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unsigned DataSize = DL.getTypeStoreSize(DataType);
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return Alignment >= DataSize && isPowerOf2_32(DataSize);
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}
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bool isLegalMaskedScatter(Type *DataType, Align Alignment) const {
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return false;
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}
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bool isLegalMaskedGather(Type *DataType, Align Alignment) const {
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return false;
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}
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bool isLegalMaskedCompressStore(Type *DataType) const { return false; }
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bool isLegalMaskedExpandLoad(Type *DataType) const { return false; }
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bool hasDivRemOp(Type *DataType, bool IsSigned) const { return false; }
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bool hasVolatileVariant(Instruction *I, unsigned AddrSpace) const {
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return false;
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}
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bool prefersVectorizedAddressing() const { return true; }
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int getScalingFactorCost(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
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bool HasBaseReg, int64_t Scale,
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unsigned AddrSpace) const {
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// Guess that all legal addressing mode are free.
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if (isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg, Scale,
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AddrSpace))
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return 0;
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return -1;
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}
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bool LSRWithInstrQueries() const { return false; }
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bool isTruncateFree(Type *Ty1, Type *Ty2) const { return false; }
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bool isProfitableToHoist(Instruction *I) const { return true; }
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bool useAA() const { return false; }
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bool isTypeLegal(Type *Ty) const { return false; }
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unsigned getRegUsageForType(Type *Ty) const { return 1; }
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bool shouldBuildLookupTables() const { return true; }
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bool shouldBuildLookupTablesForConstant(Constant *C) const { return true; }
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bool useColdCCForColdCall(Function &F) const { return false; }
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unsigned getScalarizationOverhead(VectorType *Ty, const APInt &DemandedElts,
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bool Insert, bool Extract) const {
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return 0;
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}
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unsigned getOperandsScalarizationOverhead(ArrayRef<const Value *> Args,
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unsigned VF) const {
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return 0;
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}
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bool supportsEfficientVectorElementLoadStore() const { return false; }
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bool enableAggressiveInterleaving(bool LoopHasReductions) const {
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return false;
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}
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TTI::MemCmpExpansionOptions enableMemCmpExpansion(bool OptSize,
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bool IsZeroCmp) const {
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return {};
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}
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bool enableInterleavedAccessVectorization() const { return false; }
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bool enableMaskedInterleavedAccessVectorization() const { return false; }
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bool isFPVectorizationPotentiallyUnsafe() const { return false; }
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bool allowsMisalignedMemoryAccesses(LLVMContext &Context, unsigned BitWidth,
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unsigned AddressSpace, unsigned Alignment,
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bool *Fast) const {
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return false;
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}
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TTI::PopcntSupportKind getPopcntSupport(unsigned IntTyWidthInBit) const {
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return TTI::PSK_Software;
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}
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bool haveFastSqrt(Type *Ty) const { return false; }
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bool isFCmpOrdCheaperThanFCmpZero(Type *Ty) const { return true; }
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unsigned getFPOpCost(Type *Ty) const {
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return TargetTransformInfo::TCC_Basic;
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}
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int getIntImmCodeSizeCost(unsigned Opcode, unsigned Idx, const APInt &Imm,
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Type *Ty) const {
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return 0;
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}
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unsigned getIntImmCost(const APInt &Imm, Type *Ty,
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TTI::TargetCostKind CostKind) const {
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return TTI::TCC_Basic;
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}
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unsigned getIntImmCostInst(unsigned Opcode, unsigned Idx, const APInt &Imm,
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Type *Ty, TTI::TargetCostKind CostKind,
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Instruction *Inst = nullptr) const {
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return TTI::TCC_Free;
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}
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unsigned getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx,
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const APInt &Imm, Type *Ty,
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TTI::TargetCostKind CostKind) const {
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return TTI::TCC_Free;
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}
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unsigned getNumberOfRegisters(unsigned ClassID) const { return 8; }
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unsigned getRegisterClassForType(bool Vector, Type *Ty = nullptr) const {
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return Vector ? 1 : 0;
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};
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const char *getRegisterClassName(unsigned ClassID) const {
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switch (ClassID) {
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default:
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return "Generic::Unknown Register Class";
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case 0:
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return "Generic::ScalarRC";
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case 1:
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return "Generic::VectorRC";
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}
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}
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unsigned getRegisterBitWidth(bool Vector) const { return 32; }
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unsigned getMinVectorRegisterBitWidth() const { return 128; }
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Optional<unsigned> getMaxVScale() const { return None; }
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bool shouldMaximizeVectorBandwidth(bool OptSize) const { return false; }
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unsigned getMinimumVF(unsigned ElemWidth) const { return 0; }
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unsigned getMaximumVF(unsigned ElemWidth, unsigned Opcode) const { return 0; }
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bool shouldConsiderAddressTypePromotion(
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const Instruction &I, bool &AllowPromotionWithoutCommonHeader) const {
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AllowPromotionWithoutCommonHeader = false;
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return false;
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}
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unsigned getCacheLineSize() const { return 0; }
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llvm::Optional<unsigned>
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getCacheSize(TargetTransformInfo::CacheLevel Level) const {
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switch (Level) {
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case TargetTransformInfo::CacheLevel::L1D:
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LLVM_FALLTHROUGH;
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case TargetTransformInfo::CacheLevel::L2D:
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return llvm::Optional<unsigned>();
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}
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llvm_unreachable("Unknown TargetTransformInfo::CacheLevel");
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}
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llvm::Optional<unsigned>
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getCacheAssociativity(TargetTransformInfo::CacheLevel Level) const {
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switch (Level) {
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case TargetTransformInfo::CacheLevel::L1D:
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LLVM_FALLTHROUGH;
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case TargetTransformInfo::CacheLevel::L2D:
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return llvm::Optional<unsigned>();
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}
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llvm_unreachable("Unknown TargetTransformInfo::CacheLevel");
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}
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unsigned getPrefetchDistance() const { return 0; }
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unsigned getMinPrefetchStride(unsigned NumMemAccesses,
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unsigned NumStridedMemAccesses,
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unsigned NumPrefetches, bool HasCall) const {
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return 1;
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}
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unsigned getMaxPrefetchIterationsAhead() const { return UINT_MAX; }
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bool enableWritePrefetching() const { return false; }
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unsigned getMaxInterleaveFactor(unsigned VF) const { return 1; }
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unsigned getArithmeticInstrCost(unsigned Opcode, Type *Ty,
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TTI::TargetCostKind CostKind,
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TTI::OperandValueKind Opd1Info,
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TTI::OperandValueKind Opd2Info,
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TTI::OperandValueProperties Opd1PropInfo,
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TTI::OperandValueProperties Opd2PropInfo,
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ArrayRef<const Value *> Args,
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const Instruction *CxtI = nullptr) const {
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// FIXME: A number of transformation tests seem to require these values
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// which seems a little odd for how arbitary there are.
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switch (Opcode) {
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default:
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break;
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case Instruction::FDiv:
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case Instruction::FRem:
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case Instruction::SDiv:
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case Instruction::SRem:
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case Instruction::UDiv:
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case Instruction::URem:
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// FIXME: Unlikely to be true for CodeSize.
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return TTI::TCC_Expensive;
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}
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return 1;
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}
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unsigned getShuffleCost(TTI::ShuffleKind Kind, VectorType *Ty, int Index,
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VectorType *SubTp) const {
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return 1;
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}
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unsigned getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src,
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TTI::CastContextHint CCH,
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TTI::TargetCostKind CostKind,
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const Instruction *I) const {
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switch (Opcode) {
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default:
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break;
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case Instruction::IntToPtr: {
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unsigned SrcSize = Src->getScalarSizeInBits();
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if (DL.isLegalInteger(SrcSize) &&
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SrcSize <= DL.getPointerTypeSizeInBits(Dst))
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return 0;
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break;
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}
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case Instruction::PtrToInt: {
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unsigned DstSize = Dst->getScalarSizeInBits();
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if (DL.isLegalInteger(DstSize) &&
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DstSize >= DL.getPointerTypeSizeInBits(Src))
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return 0;
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break;
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}
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case Instruction::BitCast:
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if (Dst == Src || (Dst->isPointerTy() && Src->isPointerTy()))
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// Identity and pointer-to-pointer casts are free.
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return 0;
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break;
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case Instruction::Trunc: {
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// trunc to a native type is free (assuming the target has compare and
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// shift-right of the same width).
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TypeSize DstSize = DL.getTypeSizeInBits(Dst);
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if (!DstSize.isScalable() && DL.isLegalInteger(DstSize.getFixedSize()))
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return 0;
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break;
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}
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}
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return 1;
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}
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unsigned getExtractWithExtendCost(unsigned Opcode, Type *Dst,
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VectorType *VecTy, unsigned Index) const {
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return 1;
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}
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unsigned getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind) const {
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// A phi would be free, unless we're costing the throughput because it
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// will require a register.
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if (Opcode == Instruction::PHI && CostKind != TTI::TCK_RecipThroughput)
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return 0;
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return 1;
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}
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unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy,
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CmpInst::Predicate VecPred,
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TTI::TargetCostKind CostKind,
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const Instruction *I) const {
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return 1;
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}
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unsigned getVectorInstrCost(unsigned Opcode, Type *Val,
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unsigned Index) const {
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return 1;
|
|
}
|
|
|
|
unsigned getMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment,
|
|
unsigned AddressSpace, TTI::TargetCostKind CostKind,
|
|
const Instruction *I) const {
|
|
return 1;
|
|
}
|
|
|
|
unsigned getMaskedMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment,
|
|
unsigned AddressSpace,
|
|
TTI::TargetCostKind CostKind) const {
|
|
return 1;
|
|
}
|
|
|
|
unsigned getGatherScatterOpCost(unsigned Opcode, Type *DataTy,
|
|
const Value *Ptr, bool VariableMask,
|
|
Align Alignment, TTI::TargetCostKind CostKind,
|
|
const Instruction *I = nullptr) const {
|
|
return 1;
|
|
}
|
|
|
|
unsigned getInterleavedMemoryOpCost(
|
|
unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices,
|
|
Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind,
|
|
bool UseMaskForCond, bool UseMaskForGaps) const {
|
|
return 1;
|
|
}
|
|
|
|
unsigned getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,
|
|
TTI::TargetCostKind CostKind) const {
|
|
switch (ICA.getID()) {
|
|
default:
|
|
break;
|
|
case Intrinsic::annotation:
|
|
case Intrinsic::assume:
|
|
case Intrinsic::sideeffect:
|
|
case Intrinsic::pseudoprobe:
|
|
case Intrinsic::dbg_declare:
|
|
case Intrinsic::dbg_value:
|
|
case Intrinsic::dbg_label:
|
|
case Intrinsic::invariant_start:
|
|
case Intrinsic::invariant_end:
|
|
case Intrinsic::launder_invariant_group:
|
|
case Intrinsic::strip_invariant_group:
|
|
case Intrinsic::is_constant:
|
|
case Intrinsic::lifetime_start:
|
|
case Intrinsic::lifetime_end:
|
|
case Intrinsic::experimental_noalias_scope_decl:
|
|
case Intrinsic::objectsize:
|
|
case Intrinsic::ptr_annotation:
|
|
case Intrinsic::var_annotation:
|
|
case Intrinsic::experimental_gc_result:
|
|
case Intrinsic::experimental_gc_relocate:
|
|
case Intrinsic::coro_alloc:
|
|
case Intrinsic::coro_begin:
|
|
case Intrinsic::coro_free:
|
|
case Intrinsic::coro_end:
|
|
case Intrinsic::coro_frame:
|
|
case Intrinsic::coro_size:
|
|
case Intrinsic::coro_suspend:
|
|
case Intrinsic::coro_param:
|
|
case Intrinsic::coro_subfn_addr:
|
|
// These intrinsics don't actually represent code after lowering.
|
|
return 0;
|
|
}
|
|
return 1;
|
|
}
|
|
|
|
unsigned getCallInstrCost(Function *F, Type *RetTy, ArrayRef<Type *> Tys,
|
|
TTI::TargetCostKind CostKind) const {
|
|
return 1;
|
|
}
|
|
|
|
unsigned getNumberOfParts(Type *Tp) const { return 0; }
|
|
|
|
unsigned getAddressComputationCost(Type *Tp, ScalarEvolution *,
|
|
const SCEV *) const {
|
|
return 0;
|
|
}
|
|
|
|
unsigned getArithmeticReductionCost(unsigned, VectorType *, bool,
|
|
TTI::TargetCostKind) const {
|
|
return 1;
|
|
}
|
|
|
|
unsigned getMinMaxReductionCost(VectorType *, VectorType *, bool, bool,
|
|
TTI::TargetCostKind) const {
|
|
return 1;
|
|
}
|
|
|
|
InstructionCost getExtendedAddReductionCost(
|
|
bool IsMLA, bool IsUnsigned, Type *ResTy, VectorType *Ty,
|
|
TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput) const {
|
|
return 1;
|
|
}
|
|
|
|
unsigned getCostOfKeepingLiveOverCall(ArrayRef<Type *> Tys) const {
|
|
return 0;
|
|
}
|
|
|
|
bool getTgtMemIntrinsic(IntrinsicInst *Inst, MemIntrinsicInfo &Info) const {
|
|
return false;
|
|
}
|
|
|
|
unsigned getAtomicMemIntrinsicMaxElementSize() const {
|
|
// Note for overrides: You must ensure for all element unordered-atomic
|
|
// memory intrinsics that all power-of-2 element sizes up to, and
|
|
// including, the return value of this method have a corresponding
|
|
// runtime lib call. These runtime lib call definitions can be found
|
|
// in RuntimeLibcalls.h
|
|
return 0;
|
|
}
|
|
|
|
Value *getOrCreateResultFromMemIntrinsic(IntrinsicInst *Inst,
|
|
Type *ExpectedType) const {
|
|
return nullptr;
|
|
}
|
|
|
|
Type *getMemcpyLoopLoweringType(LLVMContext &Context, Value *Length,
|
|
unsigned SrcAddrSpace, unsigned DestAddrSpace,
|
|
unsigned SrcAlign, unsigned DestAlign) const {
|
|
return Type::getInt8Ty(Context);
|
|
}
|
|
|
|
void getMemcpyLoopResidualLoweringType(
|
|
SmallVectorImpl<Type *> &OpsOut, LLVMContext &Context,
|
|
unsigned RemainingBytes, unsigned SrcAddrSpace, unsigned DestAddrSpace,
|
|
unsigned SrcAlign, unsigned DestAlign) const {
|
|
for (unsigned i = 0; i != RemainingBytes; ++i)
|
|
OpsOut.push_back(Type::getInt8Ty(Context));
|
|
}
|
|
|
|
bool areInlineCompatible(const Function *Caller,
|
|
const Function *Callee) const {
|
|
return (Caller->getFnAttribute("target-cpu") ==
|
|
Callee->getFnAttribute("target-cpu")) &&
|
|
(Caller->getFnAttribute("target-features") ==
|
|
Callee->getFnAttribute("target-features"));
|
|
}
|
|
|
|
bool areFunctionArgsABICompatible(const Function *Caller,
|
|
const Function *Callee,
|
|
SmallPtrSetImpl<Argument *> &Args) const {
|
|
return (Caller->getFnAttribute("target-cpu") ==
|
|
Callee->getFnAttribute("target-cpu")) &&
|
|
(Caller->getFnAttribute("target-features") ==
|
|
Callee->getFnAttribute("target-features"));
|
|
}
|
|
|
|
bool isIndexedLoadLegal(TTI::MemIndexedMode Mode, Type *Ty,
|
|
const DataLayout &DL) const {
|
|
return false;
|
|
}
|
|
|
|
bool isIndexedStoreLegal(TTI::MemIndexedMode Mode, Type *Ty,
|
|
const DataLayout &DL) const {
|
|
return false;
|
|
}
|
|
|
|
unsigned getLoadStoreVecRegBitWidth(unsigned AddrSpace) const { return 128; }
|
|
|
|
bool isLegalToVectorizeLoad(LoadInst *LI) const { return true; }
|
|
|
|
bool isLegalToVectorizeStore(StoreInst *SI) const { return true; }
|
|
|
|
bool isLegalToVectorizeLoadChain(unsigned ChainSizeInBytes, Align Alignment,
|
|
unsigned AddrSpace) const {
|
|
return true;
|
|
}
|
|
|
|
bool isLegalToVectorizeStoreChain(unsigned ChainSizeInBytes, Align Alignment,
|
|
unsigned AddrSpace) const {
|
|
return true;
|
|
}
|
|
|
|
unsigned getLoadVectorFactor(unsigned VF, unsigned LoadSize,
|
|
unsigned ChainSizeInBytes,
|
|
VectorType *VecTy) const {
|
|
return VF;
|
|
}
|
|
|
|
unsigned getStoreVectorFactor(unsigned VF, unsigned StoreSize,
|
|
unsigned ChainSizeInBytes,
|
|
VectorType *VecTy) const {
|
|
return VF;
|
|
}
|
|
|
|
bool useReductionIntrinsic(unsigned Opcode, Type *Ty,
|
|
TTI::ReductionFlags Flags) const {
|
|
return false;
|
|
}
|
|
|
|
bool preferInLoopReduction(unsigned Opcode, Type *Ty,
|
|
TTI::ReductionFlags Flags) const {
|
|
return false;
|
|
}
|
|
|
|
bool preferPredicatedReductionSelect(unsigned Opcode, Type *Ty,
|
|
TTI::ReductionFlags Flags) const {
|
|
return false;
|
|
}
|
|
|
|
bool shouldExpandReduction(const IntrinsicInst *II) const { return true; }
|
|
|
|
unsigned getGISelRematGlobalCost() const { return 1; }
|
|
|
|
bool supportsScalableVectors() const { return false; }
|
|
|
|
bool hasActiveVectorLength() const { return false; }
|
|
|
|
protected:
|
|
// Obtain the minimum required size to hold the value (without the sign)
|
|
// In case of a vector it returns the min required size for one element.
|
|
unsigned minRequiredElementSize(const Value *Val, bool &isSigned) const {
|
|
if (isa<ConstantDataVector>(Val) || isa<ConstantVector>(Val)) {
|
|
const auto *VectorValue = cast<Constant>(Val);
|
|
|
|
// In case of a vector need to pick the max between the min
|
|
// required size for each element
|
|
auto *VT = cast<FixedVectorType>(Val->getType());
|
|
|
|
// Assume unsigned elements
|
|
isSigned = false;
|
|
|
|
// The max required size is the size of the vector element type
|
|
unsigned MaxRequiredSize =
|
|
VT->getElementType()->getPrimitiveSizeInBits().getFixedSize();
|
|
|
|
unsigned MinRequiredSize = 0;
|
|
for (unsigned i = 0, e = VT->getNumElements(); i < e; ++i) {
|
|
if (auto *IntElement =
|
|
dyn_cast<ConstantInt>(VectorValue->getAggregateElement(i))) {
|
|
bool signedElement = IntElement->getValue().isNegative();
|
|
// Get the element min required size.
|
|
unsigned ElementMinRequiredSize =
|
|
IntElement->getValue().getMinSignedBits() - 1;
|
|
// In case one element is signed then all the vector is signed.
|
|
isSigned |= signedElement;
|
|
// Save the max required bit size between all the elements.
|
|
MinRequiredSize = std::max(MinRequiredSize, ElementMinRequiredSize);
|
|
} else {
|
|
// not an int constant element
|
|
return MaxRequiredSize;
|
|
}
|
|
}
|
|
return MinRequiredSize;
|
|
}
|
|
|
|
if (const auto *CI = dyn_cast<ConstantInt>(Val)) {
|
|
isSigned = CI->getValue().isNegative();
|
|
return CI->getValue().getMinSignedBits() - 1;
|
|
}
|
|
|
|
if (const auto *Cast = dyn_cast<SExtInst>(Val)) {
|
|
isSigned = true;
|
|
return Cast->getSrcTy()->getScalarSizeInBits() - 1;
|
|
}
|
|
|
|
if (const auto *Cast = dyn_cast<ZExtInst>(Val)) {
|
|
isSigned = false;
|
|
return Cast->getSrcTy()->getScalarSizeInBits();
|
|
}
|
|
|
|
isSigned = false;
|
|
return Val->getType()->getScalarSizeInBits();
|
|
}
|
|
|
|
bool isStridedAccess(const SCEV *Ptr) const {
|
|
return Ptr && isa<SCEVAddRecExpr>(Ptr);
|
|
}
|
|
|
|
const SCEVConstant *getConstantStrideStep(ScalarEvolution *SE,
|
|
const SCEV *Ptr) const {
|
|
if (!isStridedAccess(Ptr))
|
|
return nullptr;
|
|
const SCEVAddRecExpr *AddRec = cast<SCEVAddRecExpr>(Ptr);
|
|
return dyn_cast<SCEVConstant>(AddRec->getStepRecurrence(*SE));
|
|
}
|
|
|
|
bool isConstantStridedAccessLessThan(ScalarEvolution *SE, const SCEV *Ptr,
|
|
int64_t MergeDistance) const {
|
|
const SCEVConstant *Step = getConstantStrideStep(SE, Ptr);
|
|
if (!Step)
|
|
return false;
|
|
APInt StrideVal = Step->getAPInt();
|
|
if (StrideVal.getBitWidth() > 64)
|
|
return false;
|
|
// FIXME: Need to take absolute value for negative stride case.
|
|
return StrideVal.getSExtValue() < MergeDistance;
|
|
}
|
|
};
|
|
|
|
/// CRTP base class for use as a mix-in that aids implementing
|
|
/// a TargetTransformInfo-compatible class.
|
|
template <typename T>
|
|
class TargetTransformInfoImplCRTPBase : public TargetTransformInfoImplBase {
|
|
private:
|
|
typedef TargetTransformInfoImplBase BaseT;
|
|
|
|
protected:
|
|
explicit TargetTransformInfoImplCRTPBase(const DataLayout &DL) : BaseT(DL) {}
|
|
|
|
public:
|
|
using BaseT::getGEPCost;
|
|
|
|
int getGEPCost(Type *PointeeType, const Value *Ptr,
|
|
ArrayRef<const Value *> Operands,
|
|
TTI::TargetCostKind CostKind = TTI::TCK_SizeAndLatency) {
|
|
assert(PointeeType && Ptr && "can't get GEPCost of nullptr");
|
|
// TODO: will remove this when pointers have an opaque type.
|
|
assert(Ptr->getType()->getScalarType()->getPointerElementType() ==
|
|
PointeeType &&
|
|
"explicit pointee type doesn't match operand's pointee type");
|
|
auto *BaseGV = dyn_cast<GlobalValue>(Ptr->stripPointerCasts());
|
|
bool HasBaseReg = (BaseGV == nullptr);
|
|
|
|
auto PtrSizeBits = DL.getPointerTypeSizeInBits(Ptr->getType());
|
|
APInt BaseOffset(PtrSizeBits, 0);
|
|
int64_t Scale = 0;
|
|
|
|
auto GTI = gep_type_begin(PointeeType, Operands);
|
|
Type *TargetType = nullptr;
|
|
|
|
// Handle the case where the GEP instruction has a single operand,
|
|
// the basis, therefore TargetType is a nullptr.
|
|
if (Operands.empty())
|
|
return !BaseGV ? TTI::TCC_Free : TTI::TCC_Basic;
|
|
|
|
for (auto I = Operands.begin(); I != Operands.end(); ++I, ++GTI) {
|
|
TargetType = GTI.getIndexedType();
|
|
// We assume that the cost of Scalar GEP with constant index and the
|
|
// cost of Vector GEP with splat constant index are the same.
|
|
const ConstantInt *ConstIdx = dyn_cast<ConstantInt>(*I);
|
|
if (!ConstIdx)
|
|
if (auto Splat = getSplatValue(*I))
|
|
ConstIdx = dyn_cast<ConstantInt>(Splat);
|
|
if (StructType *STy = GTI.getStructTypeOrNull()) {
|
|
// For structures the index is always splat or scalar constant
|
|
assert(ConstIdx && "Unexpected GEP index");
|
|
uint64_t Field = ConstIdx->getZExtValue();
|
|
BaseOffset += DL.getStructLayout(STy)->getElementOffset(Field);
|
|
} else {
|
|
// If this operand is a scalable type, bail out early.
|
|
// TODO: handle scalable vectors
|
|
if (isa<ScalableVectorType>(TargetType))
|
|
return TTI::TCC_Basic;
|
|
int64_t ElementSize =
|
|
DL.getTypeAllocSize(GTI.getIndexedType()).getFixedSize();
|
|
if (ConstIdx) {
|
|
BaseOffset +=
|
|
ConstIdx->getValue().sextOrTrunc(PtrSizeBits) * ElementSize;
|
|
} else {
|
|
// Needs scale register.
|
|
if (Scale != 0)
|
|
// No addressing mode takes two scale registers.
|
|
return TTI::TCC_Basic;
|
|
Scale = ElementSize;
|
|
}
|
|
}
|
|
}
|
|
|
|
if (static_cast<T *>(this)->isLegalAddressingMode(
|
|
TargetType, const_cast<GlobalValue *>(BaseGV),
|
|
BaseOffset.sextOrTrunc(64).getSExtValue(), HasBaseReg, Scale,
|
|
Ptr->getType()->getPointerAddressSpace()))
|
|
return TTI::TCC_Free;
|
|
return TTI::TCC_Basic;
|
|
}
|
|
|
|
int getUserCost(const User *U, ArrayRef<const Value *> Operands,
|
|
TTI::TargetCostKind CostKind) {
|
|
auto *TargetTTI = static_cast<T *>(this);
|
|
// Handle non-intrinsic calls, invokes, and callbr.
|
|
// FIXME: Unlikely to be true for anything but CodeSize.
|
|
auto *CB = dyn_cast<CallBase>(U);
|
|
if (CB && !isa<IntrinsicInst>(U)) {
|
|
if (const Function *F = CB->getCalledFunction()) {
|
|
if (!TargetTTI->isLoweredToCall(F))
|
|
return TTI::TCC_Basic; // Give a basic cost if it will be lowered
|
|
|
|
return TTI::TCC_Basic * (F->getFunctionType()->getNumParams() + 1);
|
|
}
|
|
// For indirect or other calls, scale cost by number of arguments.
|
|
return TTI::TCC_Basic * (CB->arg_size() + 1);
|
|
}
|
|
|
|
Type *Ty = U->getType();
|
|
Type *OpTy =
|
|
U->getNumOperands() == 1 ? U->getOperand(0)->getType() : nullptr;
|
|
unsigned Opcode = Operator::getOpcode(U);
|
|
auto *I = dyn_cast<Instruction>(U);
|
|
switch (Opcode) {
|
|
default:
|
|
break;
|
|
case Instruction::Call: {
|
|
assert(isa<IntrinsicInst>(U) && "Unexpected non-intrinsic call");
|
|
auto *Intrinsic = cast<IntrinsicInst>(U);
|
|
IntrinsicCostAttributes CostAttrs(Intrinsic->getIntrinsicID(), *CB);
|
|
return TargetTTI->getIntrinsicInstrCost(CostAttrs, CostKind);
|
|
}
|
|
case Instruction::Br:
|
|
case Instruction::Ret:
|
|
case Instruction::PHI:
|
|
return TargetTTI->getCFInstrCost(Opcode, CostKind);
|
|
case Instruction::ExtractValue:
|
|
case Instruction::Freeze:
|
|
return TTI::TCC_Free;
|
|
case Instruction::Alloca:
|
|
if (cast<AllocaInst>(U)->isStaticAlloca())
|
|
return TTI::TCC_Free;
|
|
break;
|
|
case Instruction::GetElementPtr: {
|
|
const GEPOperator *GEP = cast<GEPOperator>(U);
|
|
return TargetTTI->getGEPCost(GEP->getSourceElementType(),
|
|
GEP->getPointerOperand(),
|
|
Operands.drop_front());
|
|
}
|
|
case Instruction::Add:
|
|
case Instruction::FAdd:
|
|
case Instruction::Sub:
|
|
case Instruction::FSub:
|
|
case Instruction::Mul:
|
|
case Instruction::FMul:
|
|
case Instruction::UDiv:
|
|
case Instruction::SDiv:
|
|
case Instruction::FDiv:
|
|
case Instruction::URem:
|
|
case Instruction::SRem:
|
|
case Instruction::FRem:
|
|
case Instruction::Shl:
|
|
case Instruction::LShr:
|
|
case Instruction::AShr:
|
|
case Instruction::And:
|
|
case Instruction::Or:
|
|
case Instruction::Xor:
|
|
case Instruction::FNeg: {
|
|
TTI::OperandValueProperties Op1VP = TTI::OP_None;
|
|
TTI::OperandValueProperties Op2VP = TTI::OP_None;
|
|
TTI::OperandValueKind Op1VK =
|
|
TTI::getOperandInfo(U->getOperand(0), Op1VP);
|
|
TTI::OperandValueKind Op2VK = Opcode != Instruction::FNeg ?
|
|
TTI::getOperandInfo(U->getOperand(1), Op2VP) : TTI::OK_AnyValue;
|
|
SmallVector<const Value *, 2> Operands(U->operand_values());
|
|
return TargetTTI->getArithmeticInstrCost(Opcode, Ty, CostKind,
|
|
Op1VK, Op2VK,
|
|
Op1VP, Op2VP, Operands, I);
|
|
}
|
|
case Instruction::IntToPtr:
|
|
case Instruction::PtrToInt:
|
|
case Instruction::SIToFP:
|
|
case Instruction::UIToFP:
|
|
case Instruction::FPToUI:
|
|
case Instruction::FPToSI:
|
|
case Instruction::Trunc:
|
|
case Instruction::FPTrunc:
|
|
case Instruction::BitCast:
|
|
case Instruction::FPExt:
|
|
case Instruction::SExt:
|
|
case Instruction::ZExt:
|
|
case Instruction::AddrSpaceCast:
|
|
return TargetTTI->getCastInstrCost(
|
|
Opcode, Ty, OpTy, TTI::getCastContextHint(I), CostKind, I);
|
|
case Instruction::Store: {
|
|
auto *SI = cast<StoreInst>(U);
|
|
Type *ValTy = U->getOperand(0)->getType();
|
|
return TargetTTI->getMemoryOpCost(Opcode, ValTy, SI->getAlign(),
|
|
SI->getPointerAddressSpace(),
|
|
CostKind, I);
|
|
}
|
|
case Instruction::Load: {
|
|
auto *LI = cast<LoadInst>(U);
|
|
return TargetTTI->getMemoryOpCost(Opcode, U->getType(), LI->getAlign(),
|
|
LI->getPointerAddressSpace(),
|
|
CostKind, I);
|
|
}
|
|
case Instruction::Select: {
|
|
Type *CondTy = U->getOperand(0)->getType();
|
|
return TargetTTI->getCmpSelInstrCost(Opcode, U->getType(), CondTy,
|
|
CmpInst::BAD_ICMP_PREDICATE,
|
|
CostKind, I);
|
|
}
|
|
case Instruction::ICmp:
|
|
case Instruction::FCmp: {
|
|
Type *ValTy = U->getOperand(0)->getType();
|
|
// TODO: Also handle ICmp/FCmp constant expressions.
|
|
return TargetTTI->getCmpSelInstrCost(Opcode, ValTy, U->getType(),
|
|
I ? cast<CmpInst>(I)->getPredicate()
|
|
: CmpInst::BAD_ICMP_PREDICATE,
|
|
CostKind, I);
|
|
}
|
|
case Instruction::InsertElement: {
|
|
auto *IE = dyn_cast<InsertElementInst>(U);
|
|
if (!IE)
|
|
return TTI::TCC_Basic; // FIXME
|
|
auto *CI = dyn_cast<ConstantInt>(IE->getOperand(2));
|
|
unsigned Idx = CI ? CI->getZExtValue() : -1;
|
|
return TargetTTI->getVectorInstrCost(Opcode, Ty, Idx);
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|
}
|
|
case Instruction::ShuffleVector: {
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|
auto *Shuffle = dyn_cast<ShuffleVectorInst>(U);
|
|
if (!Shuffle)
|
|
return TTI::TCC_Basic; // FIXME
|
|
auto *VecTy = cast<VectorType>(U->getType());
|
|
auto *VecSrcTy = cast<VectorType>(U->getOperand(0)->getType());
|
|
|
|
// TODO: Identify and add costs for insert subvector, etc.
|
|
int SubIndex;
|
|
if (Shuffle->isExtractSubvectorMask(SubIndex))
|
|
return TargetTTI->getShuffleCost(TTI::SK_ExtractSubvector, VecSrcTy,
|
|
SubIndex, VecTy);
|
|
else if (Shuffle->changesLength())
|
|
return CostKind == TTI::TCK_RecipThroughput ? -1 : 1;
|
|
else if (Shuffle->isIdentity())
|
|
return 0;
|
|
else if (Shuffle->isReverse())
|
|
return TargetTTI->getShuffleCost(TTI::SK_Reverse, VecTy, 0, nullptr);
|
|
else if (Shuffle->isSelect())
|
|
return TargetTTI->getShuffleCost(TTI::SK_Select, VecTy, 0, nullptr);
|
|
else if (Shuffle->isTranspose())
|
|
return TargetTTI->getShuffleCost(TTI::SK_Transpose, VecTy, 0, nullptr);
|
|
else if (Shuffle->isZeroEltSplat())
|
|
return TargetTTI->getShuffleCost(TTI::SK_Broadcast, VecTy, 0, nullptr);
|
|
else if (Shuffle->isSingleSource())
|
|
return TargetTTI->getShuffleCost(TTI::SK_PermuteSingleSrc, VecTy, 0,
|
|
nullptr);
|
|
|
|
return TargetTTI->getShuffleCost(TTI::SK_PermuteTwoSrc, VecTy, 0,
|
|
nullptr);
|
|
}
|
|
case Instruction::ExtractElement: {
|
|
unsigned Idx = -1;
|
|
auto *EEI = dyn_cast<ExtractElementInst>(U);
|
|
if (!EEI)
|
|
return TTI::TCC_Basic; // FIXME
|
|
|
|
auto *CI = dyn_cast<ConstantInt>(EEI->getOperand(1));
|
|
if (CI)
|
|
Idx = CI->getZExtValue();
|
|
|
|
// Try to match a reduction (a series of shufflevector and vector ops
|
|
// followed by an extractelement).
|
|
unsigned RdxOpcode;
|
|
VectorType *RdxType;
|
|
bool IsPairwise;
|
|
switch (TTI::matchVectorReduction(EEI, RdxOpcode, RdxType, IsPairwise)) {
|
|
case TTI::RK_Arithmetic:
|
|
return TargetTTI->getArithmeticReductionCost(RdxOpcode, RdxType,
|
|
IsPairwise, CostKind);
|
|
case TTI::RK_MinMax:
|
|
return TargetTTI->getMinMaxReductionCost(
|
|
RdxType, cast<VectorType>(CmpInst::makeCmpResultType(RdxType)),
|
|
IsPairwise, /*IsUnsigned=*/false, CostKind);
|
|
case TTI::RK_UnsignedMinMax:
|
|
return TargetTTI->getMinMaxReductionCost(
|
|
RdxType, cast<VectorType>(CmpInst::makeCmpResultType(RdxType)),
|
|
IsPairwise, /*IsUnsigned=*/true, CostKind);
|
|
case TTI::RK_None:
|
|
break;
|
|
}
|
|
return TargetTTI->getVectorInstrCost(Opcode, U->getOperand(0)->getType(),
|
|
Idx);
|
|
}
|
|
}
|
|
// By default, just classify everything as 'basic'.
|
|
return TTI::TCC_Basic;
|
|
}
|
|
|
|
int getInstructionLatency(const Instruction *I) {
|
|
SmallVector<const Value *, 4> Operands(I->operand_values());
|
|
if (getUserCost(I, Operands, TTI::TCK_Latency) == TTI::TCC_Free)
|
|
return 0;
|
|
|
|
if (isa<LoadInst>(I))
|
|
return 4;
|
|
|
|
Type *DstTy = I->getType();
|
|
|
|
// Usually an intrinsic is a simple instruction.
|
|
// A real function call is much slower.
|
|
if (auto *CI = dyn_cast<CallInst>(I)) {
|
|
const Function *F = CI->getCalledFunction();
|
|
if (!F || static_cast<T *>(this)->isLoweredToCall(F))
|
|
return 40;
|
|
// Some intrinsics return a value and a flag, we use the value type
|
|
// to decide its latency.
|
|
if (StructType *StructTy = dyn_cast<StructType>(DstTy))
|
|
DstTy = StructTy->getElementType(0);
|
|
// Fall through to simple instructions.
|
|
}
|
|
|
|
if (VectorType *VectorTy = dyn_cast<VectorType>(DstTy))
|
|
DstTy = VectorTy->getElementType();
|
|
if (DstTy->isFloatingPointTy())
|
|
return 3;
|
|
|
|
return 1;
|
|
}
|
|
};
|
|
} // namespace llvm
|
|
|
|
#endif
|