66 lines
1.8 KiB
C++
66 lines
1.8 KiB
C++
//===-- AssemblerTest.cpp ---------------------------------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "../Common/AssemblerUtils.h"
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#include "X86InstrInfo.h"
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namespace llvm {
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namespace exegesis {
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void InitializeX86ExegesisTarget();
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namespace {
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using X86::EAX;
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using X86::MOV32ri;
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using X86::MOV64ri32;
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using X86::RAX;
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using X86::XOR32rr;
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class X86MachineFunctionGeneratorTest
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: public MachineFunctionGeneratorBaseTest {
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protected:
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X86MachineFunctionGeneratorTest()
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: MachineFunctionGeneratorBaseTest("x86_64-unknown-linux", "haswell") {}
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static void SetUpTestCase() {
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LLVMInitializeX86TargetInfo();
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LLVMInitializeX86TargetMC();
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LLVMInitializeX86Target();
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LLVMInitializeX86AsmPrinter();
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InitializeX86ExegesisTarget();
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}
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};
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TEST_F(X86MachineFunctionGeneratorTest, DISABLED_JitFunction) {
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Check({}, MCInst(), 0xc3);
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}
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TEST_F(X86MachineFunctionGeneratorTest, DISABLED_JitFunctionXOR32rr_X86) {
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Check({{EAX, APInt(32, 1)}},
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MCInstBuilder(XOR32rr).addReg(EAX).addReg(EAX).addReg(EAX),
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// mov eax, 1
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0xb8, 0x01, 0x00, 0x00, 0x00,
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// xor eax, eax
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0x31, 0xc0, 0xc3);
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}
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TEST_F(X86MachineFunctionGeneratorTest, DISABLED_JitFunctionMOV64ri) {
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Check({}, MCInstBuilder(MOV64ri32).addReg(RAX).addImm(42), 0x48, 0xc7, 0xc0,
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0x2a, 0x00, 0x00, 0x00, 0xc3);
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}
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TEST_F(X86MachineFunctionGeneratorTest, DISABLED_JitFunctionMOV32ri) {
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Check({}, MCInstBuilder(MOV32ri).addReg(EAX).addImm(42), 0xb8, 0x2a, 0x00,
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0x00, 0x00, 0xc3);
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}
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} // namespace
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} // namespace exegesis
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} // namespace llvm
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