134 lines
8.6 KiB
C
134 lines
8.6 KiB
C
// RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon -target-cpu cyclone \
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// RUN: -disable-O0-optnone -emit-llvm -o - %s | opt -S -mem2reg \
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// RUN: | FileCheck --check-prefix=COMMON --check-prefix=COMMONIR --check-prefix=UNCONSTRAINED %s
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// RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon -target-cpu cyclone \
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// RUN: -ffp-exception-behavior=strict \
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// RUN: -fexperimental-strict-floating-point \
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// RUN: -disable-O0-optnone -emit-llvm -o - %s | opt -S -mem2reg \
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// RUN: | FileCheck --check-prefix=COMMON --check-prefix=COMMONIR --check-prefix=CONSTRAINED %s
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// RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon -target-cpu cyclone \
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// RUN: -disable-O0-optnone -emit-llvm -o - %s | opt -S -mem2reg | llc -o=- - \
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// RUN: | FileCheck --check-prefix=COMMON --check-prefix=CHECK-ASM %s
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// RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon -target-cpu cyclone \
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// RUN: -ffp-exception-behavior=strict \
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// RUN: -fexperimental-strict-floating-point \
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// RUN: -disable-O0-optnone -emit-llvm -o - %s | opt -S -mem2reg | llc -o=- - \
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// RUN: | FileCheck --check-prefix=COMMON --check-prefix=CHECK-ASM %s
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// REQUIRES: aarch64-registered-target
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// Test new aarch64 intrinsics and types but constrained
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#include <arm_neon.h>
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// COMMON-LABEL: test_vfmas_lane_f32
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// COMMONIR: [[EXTRACT:%.*]] = extractelement <2 x float> %c, i32 1
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// UNCONSTRAINED: [[TMP2:%.*]] = call float @llvm.fma.f32(float %b, float [[EXTRACT]], float %a)
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// CONSTRAINED: [[TMP2:%.*]] = call float @llvm.experimental.constrained.fma.f32(float %b, float [[EXTRACT]], float %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
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// CHECK-ASM: fmla s{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}.s[{{[0-9]+}}]
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// COMMONIR: ret float [[TMP2]]
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float32_t test_vfmas_lane_f32(float32_t a, float32_t b, float32x2_t c) {
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return vfmas_lane_f32(a, b, c, 1);
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}
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// COMMON-LABEL: test_vfmad_lane_f64
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// COMMONIR: [[EXTRACT:%.*]] = extractelement <1 x double> %c, i32 0
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// UNCONSTRAINED: [[TMP2:%.*]] = call double @llvm.fma.f64(double %b, double [[EXTRACT]], double %a)
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// CONSTRAINED: [[TMP2:%.*]] = call double @llvm.experimental.constrained.fma.f64(double %b, double [[EXTRACT]], double %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
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// CHECK-ASM: fmadd d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
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// COMMONIR: ret double [[TMP2]]
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float64_t test_vfmad_lane_f64(float64_t a, float64_t b, float64x1_t c) {
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return vfmad_lane_f64(a, b, c, 0);
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}
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// COMMON-LABEL: test_vfmad_laneq_f64
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// COMMONIR: [[EXTRACT:%.*]] = extractelement <2 x double> %c, i32 1
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// UNCONSTRAINED: [[TMP2:%.*]] = call double @llvm.fma.f64(double %b, double [[EXTRACT]], double %a)
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// CONSTRAINED: [[TMP2:%.*]] = call double @llvm.experimental.constrained.fma.f64(double %b, double [[EXTRACT]], double %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
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// CHECK-ASM: fmla d{{[0-9]+}}, d{{[0-9]+}}, v{{[0-9]+}}.d[{{[0-9]+}}]
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// COMMONIR: ret double [[TMP2]]
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float64_t test_vfmad_laneq_f64(float64_t a, float64_t b, float64x2_t c) {
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return vfmad_laneq_f64(a, b, c, 1);
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}
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// COMMON-LABEL: test_vfmss_lane_f32
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// COMMONIR: [[SUB:%.*]] = fneg float %b
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// COMMONIR: [[EXTRACT:%.*]] = extractelement <2 x float> %c, i32 1
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// UNCONSTRAINED: [[TMP2:%.*]] = call float @llvm.fma.f32(float [[SUB]], float [[EXTRACT]], float %a)
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// CONSTRAINED: [[TMP2:%.*]] = call float @llvm.experimental.constrained.fma.f32(float [[SUB]], float [[EXTRACT]], float %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
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// CHECK-ASM: fmls s{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}.s[{{[0-9]+}}]
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// COMMONIR: ret float [[TMP2]]
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float32_t test_vfmss_lane_f32(float32_t a, float32_t b, float32x2_t c) {
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return vfmss_lane_f32(a, b, c, 1);
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}
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// COMMON-LABEL: test_vfma_lane_f64
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// COMMONIR: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8>
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// COMMONIR: [[TMP1:%.*]] = bitcast <1 x double> %b to <8 x i8>
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// COMMONIR: [[TMP2:%.*]] = bitcast <1 x double> %v to <8 x i8>
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// COMMONIR: [[TMP3:%.*]] = bitcast <8 x i8> [[TMP2]] to <1 x double>
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// COMMONIR: [[LANE:%.*]] = shufflevector <1 x double> [[TMP3]], <1 x double> [[TMP3]], <1 x i32> zeroinitializer
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// COMMONIR: [[FMLA:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x double>
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// COMMONIR: [[FMLA1:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x double>
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// UNCONSTRAINED: [[FMLA2:%.*]] = call <1 x double> @llvm.fma.v1f64(<1 x double> [[FMLA]], <1 x double> [[LANE]], <1 x double> [[FMLA1]])
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// CONSTRAINED: [[FMLA2:%.*]] = call <1 x double> @llvm.experimental.constrained.fma.v1f64(<1 x double> [[FMLA]], <1 x double> [[LANE]], <1 x double> [[FMLA1]], metadata !"round.tonearest", metadata !"fpexcept.strict")
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// CHECK-ASM: fmadd d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
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// COMMONIR: ret <1 x double> [[FMLA2]]
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float64x1_t test_vfma_lane_f64(float64x1_t a, float64x1_t b, float64x1_t v) {
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return vfma_lane_f64(a, b, v, 0);
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}
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// COMMON-LABEL: test_vfms_lane_f64
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// COMMONIR: [[SUB:%.*]] = fneg <1 x double> %b
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// COMMONIR: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8>
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// COMMONIR: [[TMP1:%.*]] = bitcast <1 x double> [[SUB]] to <8 x i8>
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// COMMONIR: [[TMP2:%.*]] = bitcast <1 x double> %v to <8 x i8>
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// COMMONIR: [[TMP3:%.*]] = bitcast <8 x i8> [[TMP2]] to <1 x double>
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// COMMONIR: [[LANE:%.*]] = shufflevector <1 x double> [[TMP3]], <1 x double> [[TMP3]], <1 x i32> zeroinitializer
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// COMMONIR: [[FMLA:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x double>
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// COMMONIR: [[FMLA1:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x double>
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// UNCONSTRAINED: [[FMLA2:%.*]] = call <1 x double> @llvm.fma.v1f64(<1 x double> [[FMLA]], <1 x double> [[LANE]], <1 x double> [[FMLA1]])
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// CONSTRAINED: [[FMLA2:%.*]] = call <1 x double> @llvm.experimental.constrained.fma.v1f64(<1 x double> [[FMLA]], <1 x double> [[LANE]], <1 x double> [[FMLA1]], metadata !"round.tonearest", metadata !"fpexcept.strict")
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// CHECK-ASM: fmsub d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
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// COMMONIR: ret <1 x double> [[FMLA2]]
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float64x1_t test_vfms_lane_f64(float64x1_t a, float64x1_t b, float64x1_t v) {
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return vfms_lane_f64(a, b, v, 0);
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}
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// COMMON-LABEL: test_vfma_laneq_f64
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// COMMONIR: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8>
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// COMMONIR: [[TMP1:%.*]] = bitcast <1 x double> %b to <8 x i8>
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// COMMONIR: [[TMP2:%.*]] = bitcast <2 x double> %v to <16 x i8>
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// COMMONIR: [[TMP3:%.*]] = bitcast <8 x i8> [[TMP0]] to double
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// COMMONIR: [[TMP4:%.*]] = bitcast <8 x i8> [[TMP1]] to double
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// COMMONIR: [[TMP5:%.*]] = bitcast <16 x i8> [[TMP2]] to <2 x double>
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// COMMONIR: [[EXTRACT:%.*]] = extractelement <2 x double> [[TMP5]], i32 0
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// UNCONSTRAINED: [[TMP6:%.*]] = call double @llvm.fma.f64(double [[TMP4]], double [[EXTRACT]], double [[TMP3]])
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// CONSTRAINED: [[TMP6:%.*]] = call double @llvm.experimental.constrained.fma.f64(double [[TMP4]], double [[EXTRACT]], double [[TMP3]], metadata !"round.tonearest", metadata !"fpexcept.strict")
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// CHECK-ASM: fmla d{{[0-9]+}}, d{{[0-9]+}}, v{{[0-9]+}}.d[{{[0-9]+}}]
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// COMMONIR: [[TMP7:%.*]] = bitcast double [[TMP6]] to <1 x double>
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// COMMONIR: ret <1 x double> [[TMP7]]
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float64x1_t test_vfma_laneq_f64(float64x1_t a, float64x1_t b, float64x2_t v) {
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return vfma_laneq_f64(a, b, v, 0);
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}
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// COMMON-LABEL: test_vfms_laneq_f64
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// COMMONIR: [[SUB:%.*]] = fneg <1 x double> %b
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// CHECK-ASM: fneg d{{[0-9]+}}, d{{[0-9]+}}
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// COMMONIR: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8>
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// COMMONIR: [[TMP1:%.*]] = bitcast <1 x double> [[SUB]] to <8 x i8>
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// COMMONIR: [[TMP2:%.*]] = bitcast <2 x double> %v to <16 x i8>
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// COMMONIR: [[TMP3:%.*]] = bitcast <8 x i8> [[TMP0]] to double
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// COMMONIR: [[TMP4:%.*]] = bitcast <8 x i8> [[TMP1]] to double
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// COMMONIR: [[TMP5:%.*]] = bitcast <16 x i8> [[TMP2]] to <2 x double>
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// COMMONIR: [[EXTRACT:%.*]] = extractelement <2 x double> [[TMP5]], i32 0
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// UNCONSTRAINED: [[TMP6:%.*]] = call double @llvm.fma.f64(double [[TMP4]], double [[EXTRACT]], double [[TMP3]])
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// CONSTRAINED: [[TMP6:%.*]] = call double @llvm.experimental.constrained.fma.f64(double [[TMP4]], double [[EXTRACT]], double [[TMP3]], metadata !"round.tonearest", metadata !"fpexcept.strict")
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// CHECK-ASM: fmla d{{[0-9]+}}, d{{[0-9]+}}, v{{[0-9]+}}.d[{{[0-9]+}}]
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// COMMONIR: [[TMP7:%.*]] = bitcast double [[TMP6]] to <1 x double>
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// COMMONIR: ret <1 x double> [[TMP7]]
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float64x1_t test_vfms_laneq_f64(float64x1_t a, float64x1_t b, float64x2_t v) {
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return vfms_laneq_f64(a, b, v, 0);
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}
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